High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

Abstract

This thesis is the result of my work as research assistant at the Institute for Communication Technologies and Embedded Systems (ICE) at the RWTH Aachen University. During this time I have been accompanied and supported by many people. It is my great pleasure to take this opportunity to thank them. My most sincere thanks go to my advisors, Prof. Anupam Chattopadhyay and Prof. Tobias Noll. Anupam has been extremely helpful and tremendously inspiring throughout my PhD study. Prof. Noll has been impressively knowledgeable while patient with my ideas and mistakes. Their thoughtful advices have greatly contributed to this work and influenced me for my future career. Special thanks go to my defense committee members, Prof. Andrei Vescan and Prof. Renato Negra for spending their time, offering oral exam, giving me feedback, and attending my defense session. Several colleagues in ICE and EECS have assisted and encouraged me during the past five years for my work and personal life. Among them I would like to show my deep appreciation to Ayesha Khalid, Zoltán Rákossy and Michael Meixner. Furthermore, I would like to thank my students