High-Gain and Linear 60-GHz Power Amplifier With a Thin Digital 65-nm CMOS Technology

Aloui, Sofiane; Leite, Bernardo; Demirel, Nejdat; Plana, R.; Belot, Didier; Kerhervé, Eric

doi:10.1109/tmtt.2013.2258169

Cited by 32 publications

(11 citation statements)

References 28 publications

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“…The designed baluns adopted the structure proposed in [2], where a capacitor is added to the single-ended side in order to optimise its common-mode rejection ratio at the working band. The transformer's dimensions were therefore tuned in order to achieve a good trade-off among impedance matching, conversion balance and insertion loss.…”

Section: Fig 1 Schematic Of 60 Ghz 28 Nm Cmos Pamentioning

confidence: 99%

60 GHz 28 nm CMOS transformer‐coupled power amplifier for WiGig applications

et al. 2014

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A 60 GHz power amplifier (PA) based on a 28 nm CMOS technology is presented for WiGig applications. It consists of a two-stage pseudodifferential common-source structure using low-power and low-V t transistors, capacitive neutralisation for isolation enhancement and integrated transformers for impedance matching, power splitting, power combining and balanced-to-unbalanced transformation purposes. The output-stage transistors have a measured 1 dB output compression point (OCP 1 dB ) of 10.2 dBm, a 10.2 dB gain and a peak power added efficiency (PAE) as high as 35%. The fabricated PA achieves a 12 dBm OCP 1 dB , a 15.3 dB gain and a peak PAE better than 20% while occupying a silicon active area of only 0.037 mm 2 .Introduction: Recent advances in silicon-based technologies along with a demand for high-speed wireless connections have driven the development of wireless local area networks (WLANs) standards operating at 60 GHz such as WiGig [1]. Such applications require a low-cost and low-power implementation, which favours the adoption of system-on-chip implementations for the transceivers. Therefore, owing to the large amount of digital circuitry integrated in such systems, the use of advanced CMOS nodes becomes the most suitable technology choice. Nevertheless, the use of downscaled processes poses a number of challenges in the design of analogue and RF blocks. Namely, for the design of power amplifiers (PAs), the low breakdown voltage makes it increasingly difficult to obtain high-output power levels. Moreover, as the back-end-of-line of the technologies is scaled, passive devices tend to become increasingly lossy. This Letter presents the design of a 28 nm CMOS PA targeting WiGig applications in the 60 GHz band.

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Section: Fig 1 Schematic Of 60 Ghz 28 Nm Cmos Pamentioning

confidence: 99%

60 GHz 28 nm CMOS transformer‐coupled power amplifier for WiGig applications

et al. 2014

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“…Recently, on-chip transformers have become essential in fully-integrated RF CMOS power amplifiers [1][2][3]. In general, this type of transformer serves as an output balun and as a key component of the output matching network in RF CMOS power amplifiers, as shown in Figure 1, assuming that the typical CMOS power amplifier is designed using a differential structure [4][5][6][7]. Although there has been much active research to improve the overall efficiency of RF CMOS power amplifiers, most studies related to CMOS power amplifiers have focused on improving the circuit structure [8][9][10][11].…”

Section: Introductionmentioning

confidence: 99%

An Asymmetric-Width Broad-Side Coupled Transformer to Reduce the Parasitic Coupling Capacitance for Cmos Power Amplifier Applications

Park¹,

Lee²,

Park³

2019

PIER M

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In this study, we propose a broad-side coupled transformer with reduced capacitance for RF CMOS power amplifier applications. The width of the secondary winding is decreased to reduce parasitic coupling capacitance. Additionally, an auxiliary primary winding is added to improve the coupling between the primary and secondary windings. To prove feasibility of the proposed transformer, we design the transformer using 180-nm RF CMOS technology. From the simulated results of a typical transformer and the proposed broad-side coupled transformer, we successfully find that the parasitic coupling capacitance of the proposed structure is reduced compared to that of a typical structure. Additionally, the auxiliary primary winding increases the maximum available gain of the proposed transformer.

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“…Huang and Lin [21] utilised a built-in lineariser which was used to reduce non-linear distortion and increase the OP 1dB . Conventional PA design exploits a power combining technique to achieve high power performance [22].…”

Section: Introductionmentioning

confidence: 99%

Compact high‐linearity, high‐efficiency complementary metal–oxide–semiconductor power amplifier with post‐distortion lineariser for wireless local area network and Wireless Gigabit Alliance applications

Lin¹,

Chiou

Ko³

et al. 2016

IET Microwaves, Antennas & Propagation

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This study proposes a post‐distortion linearisation technique for 5 and 60 GHz complementary metal–oxide–semiconductor (CMOS) power amplifiers (PAs). The technique improves the output 1 dB gain compression point (OP1dB) and power‐added efficiency (PAE) of the PA when the lineariser is turned on. The 5 GHz PA that is fabricated in tsmcTM 0.18 μm CMOS achieves a 16.3 dB gain, a 20 dBm OP1dB and a 32.6% PAE. The linearised 5 GHz PA improves the OP1dB and PAE by 2.3 dB and 3.2% as compared to the PA without lineariser. The difference between the OP1dB and saturated power (Psat) is <0.2 dB. The 60 GHz PA was implemented in a 90 nm CMOS process with a chip area of 0.57 mm2. The PA achieves a 14.8 dB gain, a 16.8 dBm OP1dB with a 16.3% PAE and a 15 GHz 3 dB bandwidth. The power difference between the OP1dB and Psat is <0.3 dB. The linearised 60 GHz PA improves the OP1dB and PAE by 3.2 dB and 5.8% as compared to the PA without lineariser.

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High-Gain and Linear 60-GHz Power Amplifier With a Thin Digital 65-nm CMOS Technology

Cited by 32 publications

References 28 publications

60 GHz 28 nm CMOS transformer‐coupled power amplifier for WiGig applications

60 GHz 28 nm CMOS transformer‐coupled power amplifier for WiGig applications

An Asymmetric-Width Broad-Side Coupled Transformer to Reduce the Parasitic Coupling Capacitance for Cmos Power Amplifier Applications

Compact high‐linearity, high‐efficiency complementary metal–oxide–semiconductor power amplifier with post‐distortion lineariser for wireless local area network and Wireless Gigabit Alliance applications

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