High-gain 0.8-μm CMOS readout integrated circuit for FM/CW line-imaging ladar

Abstract

We are engaged in research of readout techniques and development of readout integrated circuits for active and active/passive imaging systems under development at the Army Research Laboratory. Here we report a readout integrated circuit chip designed for ARL's FM/cw line-imaging ladar. The readout chip consists of two 1 x 8 element arrays of high-gain amplifiers that convert the input photocurrent signal to a voltage signal appropriate for digitization. Each amplifier consists of a transimpedance input stage op amp followed by a voltage-gain op amp and output buffer. The input transimpedance stage is a CMOS operational amplifier designed for a transimpedance gain of almost 1 MΩ. The voltage amplifier of stage two, also an operational amplifier, is designed to provide additional gain of about 150. Test chips have been fabricated and are being tested. The initial measured transimpedance gain of the entire amplifier cell is 130 MΩ. We discuss the chip design, physical layout, and initial performance test results.