In this paper, we propose a high gain, current reused ultra wideband (UWB) low noise amplifier (LNA) that uses TSMC 0.18 μm CMOS technology. To satisfy the wide input matching and high voltage gain requirements with low power consumption, a resistive current reused technique is utilized in the first stage. A π-type LC network is adopted in the second stage to achieve sufficient gain over the entire frequency band. The proposed UWB LNA has a voltage gain of 12.9~18.1 dB and a noise figure (NF) of 4.05~6.21 dB over the frequency band of interest (1~10 GHz). The total power consumption of the proposed UWB LNA is 10.1 mW from a 1.4 V supply voltage, and the chip area is 0.95×0.9 mm.
Ⅰ. IntroductionThe ultra wideband (UWB) system is a new wireless technology that is capable of transmitting data over a wide spectrum of frequency bands with very low power consumption and high data transfer rates [1]. UWB systems are approved for use in bandwidths from 3.1 to 10.6 GHz. Different wideband pulse modulation schemes have been proposed for the UWB transmission systems, including direct-sequence systems and multiband orthogonal frequency division multiplexing systems [2~3].One of the major challenges for both UWB systems is the design of a wideband low noise amplifier (LNA). As the first active component in the receiver chain, the LNA should provide sufficient gain and sufficiently low noise to keep the overall receiver noise figure (NF) as low as possible. In most applications, obtaining wideband input matching, good linearity, and low power consumption is desirable [4]. In addition, gain flatness over the entire frequency range of interest is necessary to meet design specifications.The cost and integration advantages of CMOS technology have motivated extensive studies in high-speed CMOS design for wireless applications. Several CMOS LNAs with wideband characteristic and low power consumption have been proposed in recent years [5~12].To reduce power consumption with adequate voltage gain, the current reuse technique has usually been adopted [13]. Current reused techniques can be classified into two types. One is current reuse topology, which utilizes a two-stage cascade to share the same current source [5~8]. When the DC current is through, the circuit topology is regarded as a cascode structure, which reduces power dissipation by using the same current source. However, it requires a large chip area because additional passive components are needed. Another current reuse technique is inverter topology, which utilizes NMOS and PMOS pairs [9~12]. This technique can achieve the same NF, input impedance and overall effective transconductance with half of the power consumption required for a conventional NMOS transistor.A current reused UWB LNA was previously discussed in [14]. It satisfies low power and compact size requirements, but does not yield adequate voltage gain and bandwidth characteristics for use as an UWB receiver. To overcome these drawbacks, we propose a 1~10 GHz high gain, current reuse UWB LNA that uses T...