High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States

Biglari, Mehrdad; Lieske, Tobias; Fey, Dietmar

doi:10.1145/3232195.3232217

Cited by 12 publications

(8 citation statements)

References 11 publications

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“…A set operation is defined as switching between HRS and LRS, and reset is vice versa (Biglari et al, 2018). Because there is a large resistance variation, cell programming with verification could add an extra level of reliability (Higuchi et al, 2012).…”

Section: Write Methodologies In Rerammentioning

confidence: 99%

“…To tackle this problem, novel structures have been proposed that intrinsically reduce this stress at the cell level (Linn et al, 2010;Biglari and Fey, 2017). Write-verification (Song et al, 2013;Higuchi et al, 2012) and feedback-based programming (Lee et al, 2017;Biglari et al, 2018) terminate the write operation after detecting that the device has reached the desired state.…”

Section: Trade-offs In Writing Parameter Selectionsmentioning

confidence: 99%

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TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms

Hosseinzadeh

Biglari

Fey

2021

Front. Nanotechnol.

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Non-volatile memory (NVM) technologies offer a number of advantages over conventional memory technologies such as SRAM and DRAM. These include a smaller area requirement, a lower energy requirement for reading and partly for writing, too, and, of course, the non-volatility and especially the qualitative advantage of multi-bit capability. It is expected that memristors based on resistive random access memories (ReRAMs), phase-change memories, or spin-transfer torque random access memories will replace conventional memory technologies in certain areas or complement them in hybrid solutions. To support the design of systems that use NVMs, there is still research to be done on the modeling side of NVMs. In this paper, we focus on multi-bit ternary memories in particular. Ternary NVMs allow the implementation of extremely memory-efficient ternary weights in neural networks, which have sufficiently high accuracy in interference, or they are part of carry-free fast ternary adders. Furthermore, we lay a focus on the technology side of memristive ReRAMs. In this paper, a novel memory model in the circuit level is presented to support the design of systems that profit from ternary data representations. This model considers two read methods of ternary ReRAMs, namely, serial read and parallel read. They are extensively studied and compared in this work, as well as the write-verification method that is often used in NVMs to reduce the device stress and to increase the endurance. In addition, a comprehensive tool for the ternary model was developed, which is capable of performing energy, performance, and area estimation for a given setup. In this work, three case studies were conducted, namely, area cost per trit, excessive parameter selection for the write-verification method, and the assessment of pulse width variation and their energy latency trade-off for the write-verification method in ReRAM.

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Section: Write Methodologies In Rerammentioning

confidence: 99%

Section: Trade-offs In Writing Parameter Selectionsmentioning

confidence: 99%

TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms

Hosseinzadeh

Biglari

Fey

2021

Front. Nanotechnol.

Self Cite

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“…The cell endurance (the maximum number of transitions between the high and low resistive states) may be considered the main limitation of NVFFs. This limited endurance can reduce the lifetime of NVPs and is receiving special attention in the community [120].…”

Section: Memory Applicationsmentioning

confidence: 99%

Memristors: A Journey from Material Engineering to Beyond Von-Neumann Computing

Dias

Butzen

2021

JICS

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Memristors are a promising building block to the next generation of computing systems. Since 2008, when the physical implementation of a memristor was first postulated, the scientific community has shown a growing interest in this emerging technology. Thus, many other memristive devices have been studied, exploring a large variety of materials and properties. Furthermore, in order to support the design of practical applications, models in different abstract levels have been developed. In fact, a substantial effort has been devoted to the development of memristive based applications, which includes high-density nonvolatile memories, digital and analog circuits, as well as bio-inspired computing. In this context, this paper presents a survey, in hopes of summarizing the highlights of the literature in the last decade.

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“…Resistive RAMs (ReRAMs) [57][58][59][60][61][62][63], which store the information as the variation of resistivity of a thin oxide film. A current is injected in the oxide to change its structure and to modify its resistance value.…”

Section: Non-volatile Memoriesmentioning

confidence: 99%

Edge Computing: A Survey On the Hardware Requirements in the Internet of Things World

et al. 2019

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In today’s world, ruled by a great amount of data and mobile devices, cloud-based systems are spreading all over. Such phenomenon increases the number of connected devices, broadcast bandwidth, and information exchange. These fine-grained interconnected systems, which enable the Internet connectivity for an extremely large number of facilities (far beyond the current number of devices) go by the name of Internet of Things (IoT). In this scenario, mobile devices have an operating time which is proportional to the battery capacity, the number of operations performed per cycle and the amount of exchanged data. Since the transmission of data to a central cloud represents a very energy-hungry operation, new computational paradigms have been implemented. The computation is not completely performed in the cloud, distributing the power load among the nodes of the system, and data are compressed to reduce the transmitted power requirements. In the edge-computing paradigm, part of the computational power is moved toward data collection sources, and, only after a first elaboration, collected data are sent to the central cloud server. Indeed, the “edge” term refers to the extremities of systems represented by IoT devices. This survey paper presents the hardware architectures of typical IoT devices and sums up many of the low power techniques which make them appealing for a large scale of applications. An overview of the newest research topics is discussed, besides a final example of a complete functioning system, embedding all the introduced features.

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High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States

Cited by 12 publications

References 11 publications

TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms

TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms

Memristors: A Journey from Material Engineering to Beyond Von-Neumann Computing

Edge Computing: A Survey On the Hardware Requirements in the Internet of Things World

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