High Electron Mobility InAs Nanowire Field‐Effect Transistors

Abstract

Single-crystal InAs nanowires (NWs) are synthesized using metal-organic chemical vapor deposition (MOCVD) and fabricated into NW field-effect transistors (NWFETs) on a SiO(2)/n(+)-Si substrate with a global n(+)-Si back-gate and sputtered SiO(x)/Au underlap top-gate. For top-gate NWFETs, we have developed a model that allows accurate estimation of characteristic NW parameters, including carrier field-effect mobility and carrier concentration by taking into account series and leakage resistances, interface state capacitance, and top-gate geometry. Both the back-gate and the top-gate NWFETs exhibit room-temperature field-effect mobility as high as 6580 cm(2) V(-1) s(-1), which is the lower-bound value without interface-capacitance correction, and is the highest mobility reported to date in any semiconductor NW.

Using the Seebeck coefficient to determine charge carrier concentration, mobility, and relaxation time in InAs nanowires

“…The obtained mobility for three different temperatures are shown in Fig. 4(a) as a function of the Fermi level g. The value of around 2000 cm 2 /Vs at room temperature is greater than the field effect mobilities of Ghoneim et al 10 and Lin et al 11 but smaller than the value of Bryllert et al 12 and Dayeh et al 13 The solid lines in Fig. 4(a) are computed using s o as fitting parameter.…”

Strong Tuning of Rashba Spin–Orbit Interaction in Single InAs Nanowires

“…In the following we demonstrate a much more efficient control of  by electrolyte gating. We use PEO/LiClO 4 solid electrolyte as the surrounding gate dielectric in which Li + or 4 ClO  driven by gate voltage diffuse in a PEO matrix and stop at the nanowire-electrolyte interface. In this gating scheme, all the gate voltage is undertaken over very small distance at the surface of nanowire so that a large E is created (Fig.2a).…”

Hall effect measurements on InAs nanowires

“…Most importantly, the density of surface states between the gate dielectric and the channel material affects the resulting value for the electron concentration dramatically. [9][10][11] Within the field-effect based measurements, the NW carrier concentration is changed by the gate voltage. At the current pinch-off, all equilibrium carriers are removed and the corresponding carrier concentration is calculated from the applied gate voltage and the gate capacitance.…”

“…Here, the nanowire capacitance C was calculated according to a back-gate nanowire FET model. 9 In the same way, we obtain carrier concentration values for the other wires (cf. Table I).…”