High efficiency solar cells on direct kerfless 156 mm mono crystalline Si wafers by high throughput epitaxial growth

Hao, Ruiying; Ravi, T. S.; Siva, V.; Vatus, Jean; Miller, D.L.; Custodio, J.; Moyers, K. W.; Chen, Chia-Wei; Upadhyaya, Ajay; Rohatgi, A.

doi:10.1109/pvsc.2014.6925557

Cited by 12 publications

(10 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Additionally, the strong signature of a recombination-active bulk defect is not observable at low injection levels. In other work, effective lifetimes > 2 ms have been measured for n-type epi silicon with a resistivity of 2 Ωcm [20].…”

Section: Resultsmentioning

confidence: 88%

High-lifetime kerfless silicon wafers

Powell

Hofstetter

Fenning

et al. 2014

2014 IEEE 40th Photovoltaic Specialist Conference (PVSC)

Self Cite

View full text Add to dashboard Cite

Thin kerfless crystalline silicon wafers have long been pursued to reduce the manufacturing cost of crystalline silicon photovoltaics. However, although the potential for wafer cost reductions provided by these technologies is significant, the manufacturing cost of modules is most sensitive to power conversion efficiency. Therefore, a kerfless silicon wafer must be of sufficient electrical quality to support high device efficiencies for maximum economic impact. We present both p-type and ntype epitaxially grown kerfless material with high electrical quality. Carrier lifetimes > 300 µs effective and > 800 µs estimated bulk at a 10 15 cm -3 injection level after gettering are reported for p-type material. This material has a single-crystal structure and does not appear to be limited by interstitial iron. With n-type material, effective lifetimes > 850 µs at a 10 15 cm -3 injection level after gettering are presented.

show abstract

Section: Resultsmentioning

confidence: 88%

High-lifetime kerfless silicon wafers

Powell

Hofstetter

Fenning

et al. 2014

2014 IEEE 40th Photovoltaic Specialist Conference (PVSC)

Self Cite

View full text Add to dashboard Cite

show abstract

“…The porosity and thickness of PSI layers were optimized to grow a high‐quality epi‐Si wafer and minimize substrate consumption, while maximizing the yield of the epi wafer separation from the substrate. The epi‐Si was grown in a high‐throughput reactor at >5 µm/min growth rate to minimize the cost while maintaining the wafer quality . The reactor was designed to exploit the non‐linear depletion of trichlorosilane across the surface of the substrate at ~1150 °C under nearly atmospheric pressure.…”

Section: Device Fabricationmentioning

confidence: 99%

“…Kerfless c‐Si technology is considered promising because it avoids ingot crystallization and wire sawing , and can be cost effective. Our strategy of fabricating HJ solar cells on epitaxially grown silicon (epi‐Si) wafers produced by Direct Gas to Wafer TM technology is based on three factors as follows : (i) Thinner wafers produced by kerfless technology reduce the raw material cost considerably; (ii) The thermal donor killer annealing processing is not necessary because the oxygen concentration of <3 × 10 17 cm −3 in epi‐Si wafers is lower than that of 1 × 10 18 cm −3 in Cz‐Si wafers, reducing the production cost; and (iii) The wafer resistivity can be made consistent between wafers by doping during chemical vapor deposition, improving repeatability in manufacturing. In 1994, Yonehara et al .…”

Section: Introductionmentioning

confidence: 99%

Heterojunction solar cells with 23% efficiency onn-type epitaxial kerfless silicon wafers

Kobayashi

Watabe

Hao³

et al. 2016

Prog. Photovolt: Res. Appl.

Self Cite

View full text Add to dashboard Cite

We present a heterojunction (HJ) solar cell on n-type epitaxially grown kerfless crystalline-silicon with an in-housemeasured conversion efficiency of 23%. The total cell area is 243.4 cm 2 . The cell has a short-circuit current density of 39.6 mA cmÀ2 , an open-circuit voltage of 725 mV, and a fill factor of 0.799. The effect of stacking faults (SFs) is examined by current density (J) mapping measurements as well as by spectral response mapping. The J mapping images show that the localized lower J regions of the HJ solar cells are associated with recombination sites originating from SFs, independent of whether SFs are formed on the emitter or absorber side. The solar cell results and our analysis suggest that epitaxially grown wafers based on kerfless technology could be an alternative for low-cost industrial production of Si HJ solar cells.

show abstract

“…In this study, we first modeled the p‐type PERT cell with different full area BSF profiles to establish that an epi‐grown uniform and lightly doped thick BSF (15–30 µm, 10 17 ~10 18 cm −3 ) can produce higher cell performance compared with the counterpart PERCs. Following the model guidelines, 180–200 µm large area (239 cm 2 ) pp + wafers or structures were grown at Crystal Solar Inc. by epitaxy on a chemically formed porous Si layer on a reusable substrate. Epitaxial growth involved chemical vapor deposition (CVD) using chlorosilane gases.…”

Section: Introductionmentioning

confidence: 99%

Development of high-efficiency large-area screen-printed solar cells on direct kerfless epitaxially grown monocrystalline Si wafer and structure

Chen

Hao²,

Upadhyaya

et al. 2016

Prog. Photovolt: Res. Appl.

Self Cite

View full text Add to dashboard Cite

This paper demonstrates the potential of epitaxially grown Si wafers with doped layers for high‐efficiency solar cells. Boron‐doped 239 cm2 180–200 µm thick 2 Ω‐cm wafers were grown with and without 15 µm thick p+ layer, with a doping in the range of 1017~1018 cm−3. A layer transfer process involving porous Si layer to lift off epi‐Si wafers from the reusable substrate was used. The pp+ wafers were converted into n+pp+ passivated emitter rear totally diffused (PERT) cells by forming an oxide‐passivated POCl3‐diffused n+ emitter at the front, and oxide/nitride‐passivated epitaxially grown p+ BSF at the entire back, with local screen‐printed contacts. To demonstrate and quantify the benefit of the epi‐grown p+ layer, standard passivated emitter and rear cells (PERCs) with local BSF and contacts were also fabricated on p‐type epi‐Si wafers as well on commercial‐grade Cz wafers. Sentaurus 2D device model was used to assess the impact of the epi‐grown p+ layer, which showed an efficiency gain of ~0.5% for this PERT structure over the traditional PERC. This was validated by the cell results, which showed an efficiency of ~20.1% for the PERC, and ~20.3% for the PERT cell using epi‐Si wafers. Experimental data showed higher FF in PERT cells, largely because of the decrease in lateral resistance on the rear side. Efficiency gain, a result of higher FF, was greater than the recombination loss in the p+ layer because of the lightly doped thick p+ epi‐grown region used in this study. Copyright © 2016 John Wiley & Sons, Ltd.

show abstract

High efficiency solar cells on direct kerfless 156 mm mono crystalline Si wafers by high throughput epitaxial growth

Cited by 12 publications

References 2 publications

High-lifetime kerfless silicon wafers

High-lifetime kerfless silicon wafers

Heterojunction solar cells with 23% efficiency onn-type epitaxial kerfless silicon wafers

Development of high-efficiency large-area screen-printed solar cells on direct kerfless epitaxially grown monocrystalline Si wafer and structure

Contact Info

Product

Resources

About