2021
DOI: 10.1063/5.0055637
|View full text |Cite
|
Sign up to set email alerts
|

High-density low-loss millimeter-wave package interconnects with the impact of dielectric-material surface roughness

Abstract: Heterogeneous package integration and chiplet approaches are the key technology to enable next-generation high performance small form-factor packages for emerging applications. Millimeter-wave packaging for fifth-generation and upcoming sixth-generation platforms also need to meet the high-density low signal-loss interconnect specifications utilizing advanced conductor and dielectric materials. This article presents the comparison of the liquid-based photoimageable dielectric (PID) and dry-film dielectric mate… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

2022
2022
2023
2023

Publication Types

Select...
6
1

Relationship

0
7

Authors

Journals

citations
Cited by 10 publications
(2 citation statements)
references
References 20 publications
0
2
0
Order By: Relevance
“…The surface roughness will further increase the conductor loss as compared to the current study (without considering the surface roughness), which will exhibit a more dominant role of the conductor loss towards the insertion loss degradation. Note that the quantitative impact of the surface roughness on the insertion loss and other aspects of performance is a debatable topic, with a host of different models and experiments available in the literature [18][19][20][21][22], to which the interested readers can refer in order to explore this further.…”
Section: Discussionmentioning
confidence: 99%
“…The surface roughness will further increase the conductor loss as compared to the current study (without considering the surface roughness), which will exhibit a more dominant role of the conductor loss towards the insertion loss degradation. Note that the quantitative impact of the surface roughness on the insertion loss and other aspects of performance is a debatable topic, with a host of different models and experiments available in the literature [18][19][20][21][22], to which the interested readers can refer in order to explore this further.…”
Section: Discussionmentioning
confidence: 99%
“…7(f)) which land from the thin build-up layers directly onto the chip pads [85], [86], [19], [81], [88]. Via-in-via through package interconnects [26], [80], [81] and microviaenhanced organic RDLs on glass core substrates [114], [115], [116] were also reported for future HPC and wireless communications systems.…”
Section: Components a Transmssion Lines And Interconnectsmentioning
confidence: 99%