High-Density 3D Monolithically Integrated Multiple 1T1R Multi-Level-Cell for Neural Networks

Esmanhotto, Eduardo; Brunet, Laurent; Castellani, N.; Bonnet, Djohan; Dalgaty, Thomas; Grenouillet, L.; Ly, D. R. B.; Cagli, C.; Vizioz, C.; Allouti, N.; Laulagnet, F.; Gully, O.; Bernard-Henriques, N.; Bocquet, Marc; Molas, G.; Vivet, Pascal; Querlioz, Damien; Portal, J.M.; Mitra, Subhasish; Andrieu, F.; Fenouillet-Béranger, C.; Nowak, E.; Vianello, E.

doi:10.1109/iedm13553.2020.9372019

Cited by 35 publications

(25 citation statements)

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“…The authors claim that this makes the structure suitable for multiple deep learning applications and showed high degrees of inference accuracy within 0.01% of ideal values. However, statistical cell-to-cell variability limits the maximum number of levels because of the overlap between adjacent resistance distributions [118], and OxRAM resistance relaxation after programming leads to overlap of the memory states, which can alter the circuit reliability [119].…”

Section: Analog Deep Learning Acceleratormentioning

confidence: 99%

Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence

Molas

Nowak

2021

Applied Sciences

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This paper presents an overview of emerging memory technologies. It begins with the presentation of stand-alone and embedded memory technology evolution, since the appearance of Flash memory in the 1980s. Then, the progress of emerging memory technologies (based on filamentary, phase change, magnetic, and ferroelectric mechanisms) is presented with a review of the major demonstrations in the literature. The potential of these technologies for storage applications addressing various markets and products is discussed. Finally, we discuss how the rise of artificial intelligence and bio-inspired circuits offers an opportunity for emerging memory technology and shifts the application from pure data storage to storage and computing tasks, and also enlarges the range of required specifications at the device level due to the exponential number of new systems and architectures.

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Section: Analog Deep Learning Acceleratormentioning

confidence: 99%

Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence

Molas

Nowak

2021

Applied Sciences

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“…The process of transferring the high-precision software weights to the conductance states of the devices in the array was achieved using an iterative closed-loop multilevel programming algorithm. It is based on adapting the SET programming compliance current to obtain a conductance within a target range 24 and programming a device until its conductance falls within a pre-defined margin of tolerated error. Such an approach allows each device to be programmed with ten non-overlapping conductance levels.…”

Section: Mosaic Rsnn Hardware-software Simulationmentioning

confidence: 99%

“…Resistive Random Access Memory (RRAM) devices, otherwise referred to as memristors, have emerged as a promising memory element for such in-memory crossbar architectures [18][19][20][21][22][23] . They can be programmed with multiple discrete conductance levels 24 corresponding to different synaptic weight values in the connectivity matrix of Fig. 1c.…”

Section: Introductionmentioning

confidence: 99%

“…Continuous and dashed blue traces show the waveforms applied to the N and S inputs while the orange trace shows the response of the output towards the E port. The E output port follows the N input resulting from the device programmed into the HCS in part (a).floating-point precision weights to the low-precision conductance states of memristors in an experimental crossbar using a closed-loop iterative programming algorithm24 (see Methods).An example of the resulting spike trains produced in the Mosaic, due to an ECG time-series of the arrhythmic heartbeat plotted in Fig.5a, is shown in Fig.5b. The activity of the neurons in each predictive sub-population are bounded within red and black horizontal dashed lines.…”

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confidence: 99%

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The neuromorphic Mosaic: re-configurable in-memory small-world graphs

Dalgaty

Moro

Pra

et al. 2021

Preprint

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Thanks to their non-volatile and multi-bit properties, memristors have been extensively used as synaptic weight elements in neuromorphic architectures. However, their use to define and re-program the network connectivity has been overlooked. Here, we propose, implement and experimentally demonstrate Mosaic, a neuromorphic architecture based on a systolic array of memristor crossbars. For the first time, we use distributed non-volatile memristors not only for computation, but also for routing (i.e., to define the network connectivity). Mosaic is particularly well-suited for the implementation of re-configurable small-world graphical models, with dense local and sparse global connectivity - found extensively in the brain. We mathematically show that, as the networks scale up, the Mosaic requires less memory than in conventional memristor approaches. We map a spiking recurrent neural network on the Mosaic to solve an Electrocardiogram (ECG) anomaly detection task. While the performance is either equivalent or better than software models, the advantage of the Mosaic was clearly seen in respective one and two orders of magnitude reduction in energy requirements, compared to a micro-controller and address-event representation-based processor. Mosaic promises to open up a new approach to designing neuromorphic hardware based on graph-theoretic principles with less memory and energy.

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“…The CDs will then encode the angular position of the target. consumption [23][24][25][26][27][28][29] . Their inherent non-volatility -not requiring active power consumption to store or refresh the information -matches the asynchronous event-driven nature of neuromorphic computation perfectly, resulting in virtually no power consumption when the system is idle.…”

Section: Introductionmentioning

confidence: 99%

Neuromorphic object localization using resistive memories and ultrasonic transducers

Moro

Hardy

Fain

et al. 2021

Preprint

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Real-world sensory-processing applications require compact, low-latency, and low-power computing systems. Enabled by their in-memory event-driven computing abilities, hybrid memristive-CMOS neuromorphic architectures provide an ideal hardware substrate for such tasks. To demonstrate the full potential of such systems, we propose and experimentally demonstrate an end-to-end sensory processing solution for a real-world object localization application. Drawing inspiration from the barn owl’s neuroanatomy, we developed a bio-mimetic, event-driven object localization system that couples state-of-the-art piezoelectric micromachined ultrasound transducer (pMUT) sensors to a neuromorphic resistive memories-based computational map. We present measurement results from the fabricated system comprising resistive memories-based coincidence detectors, delay line circuits, and a full-custom pMUT sensor. We use these experimental results to calibrate our system-level simulations. These simulations are then used to estimate the angular resolution and energy efficiency of the object localization model. The results reveal the potential of our approach, evaluated in orders of magnitude greater energy efficiency than a microcontroller performing the same task.

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High-Density 3D Monolithically Integrated Multiple 1T1R Multi-Level-Cell for Neural Networks

Cited by 35 publications

References 0 publications

Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence

Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence

The neuromorphic Mosaic: re-configurable in-memory small-world graphs

Neuromorphic object localization using resistive memories and ultrasonic transducers

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