High bandwidth four-quadrant analog multiplier

Nikseresht, Sasan; Azhari, Seyed Javad; Danesh, Mohammadhadi

doi:10.1109/iraniancee.2017.7985440

Cited by 4 publications

(4 citation statements)

References 22 publications

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“…As such, many alternative designs have been proposed for CMOSbased multipliers [52]. Some topologies harness the squarelaw behavior of the drain current in the saturation region [53]- [57], while others use weak inversion to create translinear loops [58]- [61].…”

Section: B Multipliermentioning

confidence: 99%

CMOS Analog Simulators of Dynamical Systems

Araújo,

Oliveira,

Guerreiro

et al. 2024

IEEE Access

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Analog computing is based upon using physical processes to solve formal mathematical problems. In the past, it was the predominant instrument of scientific calculations. Now, as the physical limits imposed on digital devices compel research into alternate computing paradigms, a reexamination of the potentialities of analog computing is warranted. This work studies the application of analog CMOS cells toward the simulation of dynamical systems, and, more generally, solving sets of coupled time-dependent ordinary differential equations. Following a brief review of the fundamentals of systems theory and analog computing, the main set of computing elements is introduced, each comprising analog cells designed in a 130 nm process. These are subsequently applied to the realization of practical, special-purpose analog computing modules. Illustrative systems from various fields are selected for simulation. Though by no means comprehensive, these case studies highlight the capabilities of contemporary analog computing, especially in solving nonlinear problems. Circuit simulations show good agreement with solutions obtained from highorder numerical methods, at least over a limited range of system parameters. The article concludes with a brief discussion of broader analog computing applications, offering future prospects toward further exploration of its potentialities and limitations in a wide range of domains.INDEX TERMS Analog computers, differential equations, dynamical systems, integrated circuits.

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Section: B Multipliermentioning

confidence: 99%

CMOS Analog Simulators of Dynamical Systems

Araújo,

Oliveira,

Guerreiro

et al. 2024

IEEE Access

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“…The general structure design is based on the translinear loop used in [13] for squarer cells to implement squaring operation applying CMOS transistors working in weak inversion region. Also, [14] and [15] shows RMS-to-DC converter and analog multiplier respectively that they use squarer cell using folded structure through which they obtain other mathematical operations. In [15], authors use the characteristics of weak inversion region of CMOS transistors to reduce power consumption.…”

Section: Introductionmentioning

confidence: 99%

“…Also, [14] and [15] shows RMS-to-DC converter and analog multiplier respectively that they use squarer cell using folded structure through which they obtain other mathematical operations. In [15], authors use the characteristics of weak inversion region of CMOS transistors to reduce power consumption. However, low power designs suffer from low bandwidth which does not matter for biomedical applications not requiring that much bandwidth.…”

Section: Introductionmentioning

confidence: 99%

Analog Multiplier Based on Squarer Cells

Zarei

Maali

2019

IJSRSET

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In this paper, a current-mode analog multiplier circuit is proposed that utilizes MOS translinear principle. The parameters of TSMC 0.18µm technology are used to design the proposed multiplier that employs CMOS transistors operating in weak inversion region. Simulations are performed by HSPICE for the circuit to prove its great merits of; low power consumption (100µW), low supply voltage (1.6V), body effect immunity, wide input range (±100nA), bandwidth of 1 MHz, and THD of 4%.

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“…These operations include multiplication, modulation, demodulation, frequency synthesis, and logic operations. Most commonly used circuit for such operations is the Gilbert Four-Quadrant Multiplier (Nikseresht et al, 2017;Quintero, 2014;Gray et al, 2010;Chien, 2006;Can, 1999;Gilbert et al, 1974;Gilbert et al, 1968). This multiplier circuit can multiply two small input signals.…”

Section: Introductionmentioning

confidence: 99%

An Eight-Octant bipolar junction transistor analog multiplier circuit and its applications

Herath¹,

Wimalarathna²

2018

Ceylon J. Sci.

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This paper presents a circuit topology for an eight-octant analog multiplier implemented using bipolar junction transistors. The proposed circuit is an extension of four-quadrant Gilbert multiplier. The possibility of multiplying three input signals using the proposed circuit is theoretically proved. A scheme to upgrade this circuit to operate for large input signals is also proposed. Theoretical results are validated through spice simulations for small input signals. The possible use of the proposed circuit as a three input mixer, three input emitter coupled logic, or two input multiplier with an enable/disable switch is shown through spice simulations.

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High bandwidth four-quadrant analog multiplier

Cited by 4 publications

References 22 publications

CMOS Analog Simulators of Dynamical Systems

CMOS Analog Simulators of Dynamical Systems

Analog Multiplier Based on Squarer Cells

An Eight-Octant bipolar junction transistor analog multiplier circuit and its applications

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