2018
DOI: 10.48550/arxiv.1805.02921
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Hierarchical Temporal Memory using Memristor Networks: A Survey

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Cited by 4 publications
(4 citation statements)
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“…This is compatible with a state dependent parameter α, rather than a constant (see Figure 1 of [34]). A survey of recent hardware designs for temporal memory is provided in [106].…”
Section: Volatility: Autonomous Plasticitymentioning
confidence: 99%
“…This is compatible with a state dependent parameter α, rather than a constant (see Figure 1 of [34]). A survey of recent hardware designs for temporal memory is provided in [106].…”
Section: Volatility: Autonomous Plasticitymentioning
confidence: 99%
“…As the current memristor technology is unstable and memristors can have switching problems, the selection of memristive devices for this architecture is important, and the effect of the non-ideal behavior of real memristive devices should be studied. The current memristive technology allows the implementation of binary states [13], however the endurance issues, effects of switching probability of the accuracy [14] and other aspect of non-ideal behaviour of memristive devices should be studied.…”
Section: Discussionmentioning
confidence: 99%
“…(1) Spatial Pooler (SP) and (2) Temporal Memory (TM) [34], [35]. The main purpose of the HTM SP is to encode the input data and produce its sparse distributed representation that finds application in various data classification problems.…”
Section: Background a Learning Algorithms And Biologically Inspired L...mentioning
confidence: 99%