Hierarchical Optimization of Asynchronous Circuits

Abstract

-Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and communicate with each other. This paper is concerned with the problem of synthesizing such hierarchically defined systems. When the individual components are synthesized and implemented separately, it is desirable to take into account the degrees of freedom that arise from the interactions with the other components and from the specification. Specifically, we consider how one can find the set of implementations that can be "correctly substituted" for a component in the system while preserving the behavior of the total system. The notion of correct substitution is formally defined for a hierarchical network of possibly non-deterministic modules and a new solution framework based on trace theory is presented to compute and represent this complete set of correct substitutions. We show that the complete set can be captured by a single trace structure using the notion of a "maximal trace structure". We indicate how asynchronous synthesis methods may be applied to explore the solution space e.g. to generate a delay-insensitive implementation. I INTRODUCTIONThe role of asynchronous design is gaining importance due to increasing difficulties with problems like clock skew and power dissipation. In many design scenarios, the design is most naturally described and implemented hierarchically as a network of separate asynchronous modules that operate concurrently and communicate with each other. Hierarchical representations are especially important when the design is compiled from a highlevel language. Also, implementation constraints may force their physical implementations to be separated. Indeed, real-life designs show that many asynchronous applications are inherently distributive and highly interactive, thus requiring methods to handle them. When optimizing each individual component separately, it is desirable to take into account the degrees of freedom that arise from the interactions with the other components and from the specification. This is analogous to the problem of optimizing hierarchically combinational and synchronous circuits, which has been studied extensively.For the design of asynchronous control circuits, the existing literature describes a number of automated algorithmic approaches based on Petri net and state machine models [2,4,10,11,15,20,21,22,23]. These works have focussed mainly on the synthesis and optimization of individual asynchronous modules without considering the optimization freedom available in optimizing concurrent behavior. Methods based on models of communicating processes have also been extensively studied in the literature [1,3,13,18]. These methods are mainly based on syntax-directed translation techniques. Though these methods can effectively model concurrent behavior, they also have This research was sponsored in part by the European Commission under the ESPRIT (6143) project "EXACT" and HCM contract ERBCHBG...