Hierarchical memory with block transfer

Aggarwal, Alok; Chandra, Ashok K.; Snir, Marc

doi:10.1109/sfcs.1987.31

Cited by 131 publications

(125 citation statements)

References 16 publications

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“…However, some examples provide evidence that a certain level of submachine locality must nonetheless be exhibited by the D-BSP algorithm in order to achieve optimal or quasi-optimal BT algorithms. Our results are in accordance with the results in [2], which show that an efficient exploitation of the powerful block transfer capability of the BT model is able to hide access costs almost completely.…”

Section: Introductionsupporting

confidence: 91%

“…This is particularly noticeable if we look at the fundamental touching problem, which requires to bring each of a set of n memory cells to the top of memory. The following proposition is proved in [2].…”

Section: Machine Modelsmentioning

confidence: 94%

“…The f (x)-BT (Hierarchical Memory Model with Block Transfer) was introduced in [2] by augmenting the f (x)-HMM model of [1] with a block transfer facility. Specifically, as in the HMM, an access to memory location x requires time f (x), for a given nondecreasing function f (x), but the model makes also possible to copy a block of b memory cells…”

Section: Machine Modelsmentioning

confidence: 99%

“…We assume that f (x) = O (x α ), for some arbitrary constant 0 < α < 1, and that Θ (v log log v) memory is available on the host BT machine. Note that all relevant BT access functions f (x) considered in the literature [2] are captured by the above scenario. Moreover, as mentioned before, we concentrate on the case µ = O (1).…”

Section: The Simulation Algorithmmentioning

confidence: 99%

“…Among the others, the Hierarchical Memory Model (HMM) defined in [1], is a random access machine where access to memory location x requires time f (x), for a given nondecreasing function f (x), thus encouraging the exploitation of temporal locality. The Hierarchical Memory Model with Block Transfer model (BT, for short) [2,21] was subsequently introduced with the intention of also rewarding spatial locality by augmenting HMM with the capability of moving blocks of memory at a reduced cost. Also, a two-level memory organization is featured by the External Memory (EM) model [3,20], which has been extensively used in the literature to develop I/O-efficient algorithms.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Translating submachine locality into locality of reference

Fantozzi¹,

Pietracaprina²,

Pucci³

2006

Journal of Parallel and Distributed Computing

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Section: Introductionsupporting

confidence: 91%

Section: Machine Modelsmentioning

confidence: 94%

Section: Machine Modelsmentioning

confidence: 99%

Section: The Simulation Algorithmmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Translating submachine locality into locality of reference

Fantozzi¹,

Pietracaprina²,

Pucci³

2006

Journal of Parallel and Distributed Computing

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Memory aware load balance strategy on a parallel branch‐and‐bound application

Silva

Boeres

Drummond

et al. 2014

Concurrency and Computation

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SUMMARYThe latest trends in high-performance computing systems show an increasing demand on the use of a large scale multicore systems in a efficient way, so that high compute-intensive applications can be executed reasonably well. However, the exploitation of the degree of parallelism available at each multicore component can be limited by the poor utilization of the memory hierarchy available. Actually, the multicore architecture introduces some distinct features that are already observed in shared memory and distributed environments. One example is that subsets of cores can share different subsets of memory. In order to achieve high performance it is imperative that a careful allocation scheme of an application is carried out on the available cores, based on a scheduling model that considers the main performance bottlenecks, as for example, memory contention. In this paper, the Multicore Cluster Model (MCM) is proposed, which captures the most relevant performance characteristics in multicores systems such as the influence of memory hierarchy and contention. Better performance was achieved when a load balance strategy for a Branch-and-Bound application applied to the Partitioning Sets Problem is based on MCM, showing its efficiency and applicability to modern systems.

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Large-Scale Sorting in Uniform Memory Hierarchies

Vitter

Nodine

1993

Journal of Parallel and Distributed Computing

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Abstract. We present several e cient algorithms for sorting on the uniform memory hierarchy UMH, introduced by Alpern, Carter, and Feig, and its parallelization P-UMH. We give optimal and nearly-optimal algorithms for a wide range of bandwidth degradations, including a parsimonious algorithm for constant bandwidth. We also develop optimal sorting algorithms for all bandwidths for other versions of UMH and P-UMH, including natural restrictions we i n troduce called RUMH and P-RUMH, which more closely correspond to current programming languages.

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Hierarchical memory with block transfer

Cited by 131 publications

References 16 publications

Translating submachine locality into locality of reference

Translating submachine locality into locality of reference

Memory aware load balance strategy on a parallel branch‐and‐bound application

Large-Scale Sorting in Uniform Memory Hierarchies

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