Hierarchical Device-Level Modular Multilevel Converter Modeling for Parallel and Heterogeneous Transient Simulation of HVDC Systems

Abstract

System-level electromagnetic transient (EMT) simulation of large-scale power converters with high-order nonlinear semiconductor switch models remains a challenge albeit it is essential for design preview. In this work, a multi-layer hierarchical modeling methodology is proposed for high-performance computing of the modular multilevel converter involving devicelevel IGBT/diode models. The computational burden induced by converter scale and model complexity is dramatically alleviated following the proposal of topological reconfiguration and network equivalence, which create a substantial number of identical circuit units that facilitate massively parallel processing on the graphics processing unit (GPU), using the kernel-based single-instruction multi-threading computing architecture. As the DC system brings significant inhomogeneity which dilutes parallelism, heterogeneous computing is investigated and the computational tasks are properly assigned to CPU and GPU to fully exploit their respective features. The separation of nonlinear device-level models from the rest of the system enables multirate implementation for further efficiency enhancement since the two parts allow distinct time-steps. A remarkable acceleration of over 50 times is achieved by the hybrid CPU/GPU platform over conventional CPU simulation, and the validity of the proposed modeling and computing method is confirmed by commercial EMT tools ANSYS/Simplorer R and PSCAD/EMTDC R .