2021
DOI: 10.1088/1361-6439/ac12a1
|View full text |Cite
|
Sign up to set email alerts
|

Hermetic chip-scale packaging using Au:Sn eutectic bonding for implantable devices

Abstract: Advancements in miniaturisation and new capabilities of implantable devices impose a need for the development of compact, hermetic, and CMOS-compatible micro packaging methods. Gold-tin-based eutectic bonding presents the potential for achieving low-footprint seals with low permeability to moisture at process temperatures below 350 ∘C. This work describes a method for the deposition of Au:Sn eutectic alloy frames by sequential electroplating from commercially available solutions. Frames were bonded on the chip… Show more

Help me understand this report
View preprint versions

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
4
0

Year Published

2021
2021
2023
2023

Publication Types

Select...
4
2

Relationship

0
6

Authors

Journals

citations
Cited by 6 publications
(7 citation statements)
references
References 35 publications
0
4
0
Order By: Relevance
“…Additionally, they feature similar biocompatibility, corrosion resistance, and hardness profiles to metals, can be made optically transparent, and are compatible with ultrasonic power transfer technologies [192,203]. While they offer advantages in certain regards, ceramics and other similar materials, including monolithic silicon [204] and carbon allotropes such as diamond [205,206], share a great weakness as an encapsulating material, namely brittleness. A brittle fracture mode at critical strain results in the formation and propagation of channel cracks which span the entire thickness of the encapsulating material, causing them to lose all effectiveness as barriers against moisture penetration upon failure.…”
Section: Rigid Enclosuresmentioning
confidence: 99%
See 1 more Smart Citation
“…Additionally, they feature similar biocompatibility, corrosion resistance, and hardness profiles to metals, can be made optically transparent, and are compatible with ultrasonic power transfer technologies [192,203]. While they offer advantages in certain regards, ceramics and other similar materials, including monolithic silicon [204] and carbon allotropes such as diamond [205,206], share a great weakness as an encapsulating material, namely brittleness. A brittle fracture mode at critical strain results in the formation and propagation of channel cracks which span the entire thickness of the encapsulating material, causing them to lose all effectiveness as barriers against moisture penetration upon failure.…”
Section: Rigid Enclosuresmentioning
confidence: 99%
“…Traditional ceramic feedthroughs are reaching their limits in terms of channel density, as the risk of cracking and catastrophic failure increases the smaller and closer together the individual feedthroughs become [205], while BCI channel counts are constantly increasing. Additionally, extra space is required on the sides of the package for the edge sealing bond, which can only be made so small even with improved methods [204]. As a result, as miniaturization progresses, alternative encapsulation strategies which do not rely on rigid containers must be developed, even for backend electronics where they have historically been sufficient.…”
Section: Rigid Enclosuresmentioning
confidence: 99%
“…According to the joint electron device engineering council (JEDEC) reliability test standards (specific details see ref. JESD22-A110E.01 [ 35 ]), in Table 3 , we have also performed reliability tests on the RF filter packages to evaluate the integrity of the parts. Twenty chips are soldered onto a printed circuit board (PCB) and molding.…”
Section: Reliability Testmentioning
confidence: 99%
“…The silicon cover and the die are assembled to form a sealed compartment using gold-tin eutectic bonding. This lowfootprint sealing method was chosen because it is CMOScompatible (processing temperature below 350 • C), biocompatible, stable, and provides good seal hermeticity [16]. The gold and tin are electroplated onto the silicon cover, while electroless deposition is used for gold on the chip after it has been post-processed.…”
Section: System Overviewmentioning
confidence: 99%