HEMT Small-Signal Modelling for Voltage-Controlled Attenuator Applications

Yuan, Tao; Hu, Zhi; Yang, Fan; Liu, Ya Nan; He, Mei Lin; Cheng, Yu Jian; Zhang, Bo

doi:10.23919/eumic.2019.8909420

Cited by 2 publications

(4 citation statements)

References 12 publications

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“…The first point shows the iteration where

R_{normals}

and

R_{normald}

compensate for the on‐state channel resistance. However, it is known that switch‐HEMT should have a finite

R_{ds on} .

20,23 That is probably why

G_{ds off}

is still negative at this point, and the summary error metric is quite large. Decreasing the parasitic resistances further leads to the point where

G_{ds off}

becomes positive.…”

Section: Parasitic Resistance Scanning Algorithmmentioning

confidence: 98%

“…Lots of models were proposed for common‐source devices manufactured by various process technologies 15–18 . However, switch‐HEMT modeling remains challenging as only a few works studied its pitfalls 19–26 …”

Section: Introductionmentioning

confidence: 99%

“…Several EM‐simulations were applied to derive the small‐signal behavior of the CG switch‐HEMT using the measured S ‐parameters of the CS device as the model core. In recent work, Tao et al argued that conventional CS extraction techniques where capacitance mix does not affect accuracy are not applicable to the common‐gate switch‐HEMT due to large value gate resistor 22,23 . They showed that a parasitic capacitance shell of the switch‐HEMT could be easily extracted with the full‐wave electromagnetic analysis 24 .…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A new extraction flow of the s mall‐signal s witch‐HEMT model based on the parasitic resistance scanning algorithm

Popov

Добуш

Salnikov

2022

Int J RF Mic Comp-Aid Eng

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Recent research interest in switch High Electron Mobility Transistor (HEMT) modeling revealed the special modeling requirement that is a parasitic capacitance shell surrounding the equivalent circuit. Despite the robust determination of parasitic capacitances, one still may face several problems when extracting a small-signal switch-HEMT model. Practical switch-HEMT test structures include different configurations of gate network with additional microstrip lines, large-value resistors, and via-holes. Ignoring parts of these networks results in unfavorable errors when comparing measured and simulated results. Another problem may arise when extracting the switch-HEMT equivalent circuit parameters from the measured S-parameters of the grounded gate test structures: obtained parasitic resistances can be exaggerated, resulting in negative values of intrinsic channel resistance (conductance). This paper presents a new switch-HEMT extraction flow intended to address the mentioned challenges. To eliminate an excessive gate inductance attributed to via-hole, we introduce a concept of the gate network de-embedding. A negative channel resistance (conductance) problem is handled by applying a new parasitic resistance scanning algorithm that allows finding the model parameter vector with reasonable positive values in the vicinity of the Sparameters modeling error minimum. Accurate S-parameters modeling results verify the proposed extraction flow. Obtained small-signal switch-HEMT models are validated by designing and manufacturing a 2 dB digital step attenuator section.

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“…The first point shows the iteration where

R_{normals}

and

R_{normald}

compensate for the on‐state channel resistance. However, it is known that switch‐HEMT should have a finite

R_{ds on} .

20,23 That is probably why

G_{ds off}

is still negative at this point, and the summary error metric is quite large. Decreasing the parasitic resistances further leads to the point where

G_{ds off}

becomes positive.…”

Section: Parasitic Resistance Scanning Algorithmmentioning

confidence: 98%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A new extraction flow of the s mall‐signal s witch‐HEMT model based on the parasitic resistance scanning algorithm

Popov

Добуш

Salnikov

2022

Int J RF Mic Comp-Aid Eng

View full text Add to dashboard Cite

show abstract

“…R G represents the large gate‐resistor, which was modeled by a simple R‐C parallel network . The S parameters of the EM simulation structure of the resistor (shown in Reference ) is directly used here for higher precision at high frequency.…”

Section: Complete Parasitic Capacitance Shell Extractionmentioning

confidence: 99%

Complete parasitic‐capacitance‐shell extraction of high‐frequency switch‐HEMT equivalent‐circuit model

Yuan

Hu²,

Yang

2020

Int J RF Microw Comput Aided Eng

Self Cite

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This paper presents a new solution to a particular problem of high electron‐mobility transistor (HEMT) equivalent‐circuit modeling, that is, complete parasitic‐capacitance‐shell extraction of high‐frequency single‐gate and dual‐gate switch‐based HEMTs, which is very important to the accuracy of high‐frequency HEMT switch models, but not important in the conventional common‐source HEMT modeling for amplifier‐applications. A full‐wave electromagnetic (EM) analysis based method is proposed to analytically extract the complete parasitic‐capacitance‐shell of single‐gate and dual‐gate switch‐based HEMTs. All the 6 parasitic capacitances of the single‐gate switch‐based HEMT and all the 10 parasitic capacitances of the dual‐gate switch‐based HEMT are extracted by linear equations. No resistance parameter is needed to calculate the capacitance‐to‐ground and the interelectrode‐capacitance, and for the first time, all the 10 parasitic capacitances of the dual‐gate switch‐based HEMT are completely considered and analytically extracted. Then, a consistent and systematic modeling procedure of single‐gate and dual‐gate switch‐based HEMT is verified. With the complete parasitic‐capacitance‐shells extracted, the accurate intrinsic model of the single‐gate HEMT can be directly embedded into the parasitic‐shell of the dual‐gate HEMT. The predicted scattering parameters of the single‐gate and dual‐gate series switches fit well with the measurements up to 40 GHz, and accurate linear scalability are also found.

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HEMT Small-Signal Modelling for Voltage-Controlled Attenuator Applications

Cited by 2 publications

References 12 publications

A new extraction flow of the s mall‐signal s witch‐HEMT model based on the parasitic resistance scanning algorithm

A new extraction flow of the s mall‐signal s witch‐HEMT model based on the parasitic resistance scanning algorithm

Complete parasitic‐capacitance‐shell extraction of high‐frequency switch‐HEMT equivalent‐circuit model

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