Proceedings of the Tenth European Conference on Computer Systems 2015
DOI: 10.1145/2741948.2741959
|View full text |Cite
|
Sign up to set email alerts
|

Hare

Abstract: Hare is a new file system that provides a POSIX-like interface on multicore processors without cache coherence. Hare allows applications on different cores to share files, directories, and file descriptors. The challenge in designing Hare is to support the shared abstractions faithfully enough to run applications that run on traditional shared-memory operating systems, with few modifications, and to do so while scaling with an increasing number of cores.To achieve this goal, Hare must support features (such as… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
3
0

Year Published

2016
2016
2022
2022

Publication Types

Select...
4
2

Relationship

0
6

Authors

Journals

citations
Cited by 12 publications
(3 citation statements)
references
References 30 publications
0
3
0
Order By: Relevance
“…Argo, 40 a software distributed shared memory system, distributes coherence decisions using self‐invalidation and self‐downgrade combined with hierarchical queue delegation locks. Hare 10 uses message passing to implement a distributed file‐system across nodes in a non‐CC system. libMPNode 43 implements an OpenMP runtime for incoherent domains.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…Argo, 40 a software distributed shared memory system, distributes coherence decisions using self‐invalidation and self‐downgrade combined with hierarchical queue delegation locks. Hare 10 uses message passing to implement a distributed file‐system across nodes in a non‐CC system. libMPNode 43 implements an OpenMP runtime for incoherent domains.…”
Section: Related Workmentioning
confidence: 99%
“…Figure 1 depicts a taxonomy of trade‐offs between the hardware support for consistency via cache coherency and the scalability of distributed systems. Most prior research focuses on the right end of the spectrum, 9‐11 leaving alternatives in the design space unexplored. As pointed out by Harris, 12 solely relying on message passing does not suit some workloads, and what programming models are appropriate for combining message passing with shared memory is still an open research question.…”
Section: Introductionmentioning
confidence: 99%
“…Because of these trends and due to the complexities of scaling interconnects to larger core counts [17], the systems community has experienced new interest in moving from software architectures for fully cache-coherent systems to those composed of multiple incoherent domains, where cache coherence is provided only within a domain, as shown in Figure 1. Recent works have developed software architectures for mobile SoCs containing incoherent CPU cores [1,19], servers with incoherent compute elements [3,4,12] or even rack-scale clusters [21][22][23]. In these architectures, the software treats each cache coherence domain as a node and provides cross-node execution and memory coherence transparently to applications.…”
Section: Introductionmentioning
confidence: 99%