Hardware verification of litho-friendly design (LfD) methodologies

Marz, R.; Peter, Kai; Gröndahl, Sonja; Keiner, Klaus; Choi, B. C.; Quek, Shyue Fong; Yeo, Mei Chun; Chen, Nan Shu; Goh, Soo Muay

doi:10.1117/12.713995

Cited by 2 publications

(1 citation statement)

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“…3 needs to be done now is for the designers to reciprocate and close the information loop by feeding forwards findings from their side as well. Using a tool such as LFD enables the designers to gather this information in the form of error markers.…”

Section: Enhancing the Processmentioning

confidence: 99%

System to improve RET-OPC production by dynamic design coverage using sign-off litho simulator

et al. 2008

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The advanced process technologies have well known yield loss due to the degradation of pattern fidelity. The process to compensate for this problem is advanced resolution enhancement techniques (RET) and optical proximity correction (OPC). By design, the creation of RET/OPC recipes and the calibration of process models are done very early in the process development cycle with data that are not made of real designs since they are not yet available, but made of test structures that represent different sizes, distances and topologies. The process of improving the RET/OPC recipes and models is long and tedious, it is usually a key contributor to quick production ramp-up. It is very coverage limited by design. The authors will present a proposed system that, by design, is dynamic, and allows the RET/OPC production system to reach maturity faster through a detailed collection of hotspots identified at the design stage. The goal is to reduce the lapse of time required to get mature production RET/OPC recipes and models.

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Section: Enhancing the Processmentioning

confidence: 99%