Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis

Narasimhan, Seetharam; Du, Dongdong; Chakraborty, Rajat Subhra; Sauseng, Paul; Wolff, Francis; Papachristou, C.; Roy, Kaushik; Bhunia, Swarup

doi:10.1109/tc.2012.200

Cited by 209 publications

(58 citation statements)

References 25 publications

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“…Such HTs remain implicitly on, and have usually no effect on the normal functionality of the circuit. Side channels include power based channels [22], as well as heat based channels [23]. Power based HTs force the circuit to dissipate more and more power to either damage the circuit, or simply waste energy.…”

Section: Related Workmentioning

confidence: 99%

Advancing the state-of-the-art in hardware Trojans design

Haider

Jin

Dijk

2017

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)

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Abstract-Electronic Design Automation (EDA) industry heavily reuses third party IP cores. These IP cores are vulnerable to insertion of Hardware Trojans (HTs) at design time by third party IP core providers or by malicious insiders in the design team. State of the art research has shown that existing HT detection techniques, which claim to detect all publicly available HT benchmarks, can still be defeated by carefully designing new sophisticated HTs. The reason being that these techniques consider the HT landscape to be limited only to the publicly known HT benchmarks, or other similar (simple) HTs. However the adversary is not limited to these HTs and may devise new HT design principles to bypass these countermeasures. In this paper, we discover certain crucial properties of HTs which lead to the definition of an exponentially large class of Deterministic Hardware Trojans H D that an adversary can (but is not limited to) design. The discovered properties serve as HT design principles, based on which we design a new HT called XOR-LFSR and present it as a 'proof-of-concept' example from the class H D . These design principles help us understand the tremendous ways an adversary has to design a HT, and show that the existing publicly known HT benchmarks are just the tip of the iceberg on this huge landscape. This work, therefore, stresses that instead of guaranteeing a certain (low) false negative rate for a small constant set of publicly known HTs, a rigorous HT detection tool should take into account these newly discovered HT design principles and hence guarantee the detection of an exponentially large class (exponential in number of wires in IP core) of HTs with negligible false negative rate.

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Section: Related Workmentioning

confidence: 99%

Advancing the state-of-the-art in hardware Trojans design

Haider

Jin

Dijk

2017

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)

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“…A different perspective is to use these side-channel measurements to determine if malware has been inserted into a circuit, either in hardware or software. Numerous side-channel techniques have been proposed [31][32][33][34][35] to detect the presence of malicious hardware in commercial ICs. In [36], the authors demonstrated the ability to determine the class of instructions, based on hardware usage, from power supply side-channel measurements.…”

Section: Ic-level Detectionmentioning

confidence: 99%

Cross-Level Detection Framework for Attacks on Cyber-Physical Systems

et al. 2017

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Anomaly detection is critical in thwarting malicious attacks on Cyber-Physical Systems. This work presents a novel inference engine that integrates two heterogeneous anomaly detectors, working at different levels of the system architecture, in order to produce a crosslevel detector more effective than either one separately. The macro-or process-level detector uses a bank of observers of the physical plant that estimate the state of the process suspected to be under attack, specifically for its sensor to be compromised, from data gathered by available networked sensors. The estimates are then combined using a Weapons and Systems Engineering Department, U.S. Naval Academy, Annapolis, MD, USA consensus algorithm to determine if the suspect sensor is reporting false readings. The micro-level detector uses timesampled side-channel power measurements of an integrated circuit on the suspect sensor. By comparing power measurements against those from a known good state, differences indicate the code running inside has been altered. The crosslevel detector performs a two-dimensional Neyman-Pearson hypothesis test that declares the presence of an attack on the sensor node. The cross-level detector is shown to be more accurate and less latent than its constituent parts. Detection was tested against a range of False Data Injection attacks on a hardware prototype and the detector performance was measured experimentally. The cross-level detector on average achieved a 93% rate of correct detection, compared with 72 and 85% for the macro-and micro-level detectors, respectively; and a 50% reduction in latency compared to the macro-level detector.

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“…Hardware Trojan is also used to cause or amplify side-channel leakage of cryptographic hardware [25]. Note that using side channels to detect a hardware Trojan has also been the subject of several studies [26], [27], [28].…”

Section: Salware Vs Malwarementioning

confidence: 99%

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

Bossuet¹,

Bayon²,

Fischer³

2016

VLSI-SoC: Design for Reliability, Security, and Low Power

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International audienceOver the past 10 years, the designers of intellectual properties(IP) have faced increasing threats including cloning, counterfeiting, andreverse-engineering. This is now a critical issue for the microelectronicsindustry. The design of a secure, efficient, lightweight protection scheme fordesign data is a serious challenge for the hardware security community. In thiscontext, this chapter presents two ultra-lightweight transmitters using sidechannel leakage based on electromagnetic emanation to send embedded IPidentity discreetly and quickl

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Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis

Cited by 209 publications

References 25 publications

Advancing the state-of-the-art in hardware Trojans design

Advancing the state-of-the-art in hardware Trojans design

Cross-Level Detection Framework for Attacks on Cyber-Physical Systems

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

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