Hardware Tripartite Synapse Architecture based on Stochastic Computing

Liu, Junxiu; Liang, Zhewei; Luo, Yuling; Huang, Jiadong; Yang, Su

doi:10.1109/tase.2019.00-16

Cited by 3 publications

(6 citation statements)

References 21 publications

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“…The hardware analysis of the proposed astrocyte model in desynchronizing the hypersynchronous coupled neurons and regulating the synaptic transmission between presynaptic and postsynaptic neurons has the same performance of the original model. The comparison results of the hardware realization in terms of the number of resources and maximum speed have been performed between the modified models and the previous proposed tripartite synapse models in [17], [27], [43], [50]- [52]. These results are reported in Table . IV.…”

Section: Implementation Resultsmentioning

confidence: 99%

“…In recent years, SC has gained greater insight in hardware realization of neural networks and neuromorphic computing studies due to its error-tolerant inherent and the optimized performance in terms of power and occupied area [26]. In [27], authors have proposed a hardware based tripartite synapse including Leaky Integrate-and-Fire (LIF) neuron, synapse, and astrocyte using Stochastic Computing (SC) and the Extended Stochastic Logics (ESLs). ESLs has been introduced as new method for SC for the hardware design of neural network applications [28].…”

Section: Related Workmentioning

confidence: 99%

“…ESLs has been introduced as new method for SC for the hardware design of neural network applications [28]. In their work [27], astrocyte model is approximated using piece wise linear approximation method. Recently, a digital design for an optimized SC-based Izhikevich spiking neuron model is presented in [29].…”

Section: Related Workmentioning

confidence: 99%

“…The main predominancy of the proposed model over the recently published SC-based neuroglial model in [27] is that a detailed architecture for astroglial model and the hardware device utilization is discussed within this research study.…”

Section: Related Workmentioning

confidence: 99%

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A Digital Realization of Neuroglial Interaction Model and Its Network Structure

Seyedbarhagh

Ahmadi

2022

IEEE Access

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Astrocyte cells, the most existing abundant cells in central nervous system, play an essential role in modulating the neuronal activities, information processing, and regulating the synaptic plasticity through calcium (Ca2+) fluctuations of ions hemostasis by using a feedback mechanism. The pathophysiological and hypersynchronous neuronal activity can lead to the epileptic seizures, which is known as one of the neurodegenerative disorders in the field of neuroscience. This paper presents a modified neuron-astrocyte interaction (tripartite synapse) model based on leaky and integrate fire neuron and the astrocyte-synapse models using an area-efficient hardware approach called stochastic computing paradigm. The proposed model is synthesized physically on field-programmable gate array as a proof of concept. The implementation results of the presented model can mimic the bidirectional communication in biological minimal network of pre-postsynaptic and Ca2+-based model for astrocyte with considerably lower hardware cost. The influence of astrocytes on neural network behavioral has been investigated by providing a proper feedback mechanism and considering the role of gap junction coupling and the various coefficients on desynchronizing the impaired synchronization of the coupled neurons.INDEX TERMS Astrocytes, Desynchronization, Field programmable gate array (FPGA), Neural-Glial interaction.

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Section: Implementation Resultsmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

See 2 more Smart Citations

A Digital Realization of Neuroglial Interaction Model and Its Network Structure

Seyedbarhagh

Ahmadi

2022

IEEE Access

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“…SC is used to replace conventional computing components such as DSP in hardware devices, and the extended SC logic is used to scale the data range during the computing process. The results show that the proposed hardware architecture has the same output as software simulation with lower hardware resource consumption so that it can be applied to large-scale SNNs [182]. Chen and Song et al designed a probabilistic spiking neuron and realized the reconfigurable computing architecture of the neural network.…”

Section: B Application Of Sc In Snn Chipmentioning

confidence: 97%

A Survey of Intelligent Chip Design Research Based on Spiking Neural Networks

2022

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The traditional neural network Intelligent chip has the problem of high power consumption due to classical computing architecture, limiting the development of neural network Intelligent chips. Stochastic computing (SC) encodes binary numbers into stochastic pulse sequences in operation, taking advantage of low power consumption and high performance. The application of SC in spiking neural networks (SNNs) Intelligent chips is beneficial to solving the high power consumption of traditional neural network chips. This article first summarizes the basic elements of SNNs and the basic principles of SC. Then, we review the development trends of the stochastic computation-based neural network chips and existing SNN chips under research at home and abroad, respectively, and analyze the current problems. Finally, a review of SNN chips based on SC is highlighted. This paper aims to provide new research directions and to learn ideas for the field of SNN chips through systematic summaries.

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