2015
DOI: 10.1007/978-3-319-16214-0_45
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Hardware Task Scheduling for Partially Reconfigurable FPGAs

Abstract: Abstract. Partial reconfiguration (PR) of FPGAs can be used to dynamically extend and adapt the functionality of computing systems, swapping in and out HW tasks. To coordinate the on-demand task execution, we propose and implement a run time system manager for scheduling software (SW) tasks on available processor(s) and hardware (HW) tasks on any number of reconfigurable regions of a partially reconfigurable FPGA. Fed with the initial partitioning of the application into tasks, the corresponding task graph, an… Show more

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Cited by 27 publications
(15 citation statements)
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References 15 publications
(27 reference statements)
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“…Much of the work on automated partitioning tries to schedule a graph of dependent tasks onto a fixed number of regions, minimising runtime [Ayadi et al 2014;Charitopoulos et al 2015;Purgato et al 2016]. They assume that multiple FPGA regions are used similar to a multi-processor system with each region processing an independent task.…”
Section: Partitioningmentioning
confidence: 99%
See 1 more Smart Citation
“…Much of the work on automated partitioning tries to schedule a graph of dependent tasks onto a fixed number of regions, minimising runtime [Ayadi et al 2014;Charitopoulos et al 2015;Purgato et al 2016]. They assume that multiple FPGA regions are used similar to a multi-processor system with each region processing an independent task.…”
Section: Partitioningmentioning
confidence: 99%
“…Another more practical solution is to floorplan the FPGA and generate bitstreams for all tasks at all possible PRRs and store them in a database. The scheduler can then load the correct bitstream when a task is scheuled to a particular PRR [Charitopoulos et al 2015]. This scheduling can be either online or offline and the scheduler can abide by hard real-time requirements where present.…”
Section: Management Of Reconfigurable Tasksmentioning
confidence: 99%
“…As extracting the current content of all memory elements of a reconfigurable area is not that easy on commercial FPGAs, the single-tasking approach is commonly used. However, some publications provide a dedicated mechanism for "context" extraction and restoration of their reconfigurable modules to allow multitasking (cooperative (ReconOS [24], OS4RS [25]) or preemptive (RTSM [26])) approaches. Further discussions of details on possible hw-context switching strategies can be found in [27,28].…”
Section: Placement Scheduling and Preemptionmentioning
confidence: 99%
“…was developed at the Technical University of Crete (Greece) and is presented in [26]. The RTSM manages physical resources employing scheduling and placement algorithms to select the appropriate hw processing element (PE), that is, a reconfigurable area, to load and execute a particular hwtask, or to activate a software-processing element (CPU) for executing the SW version of a task.…”
Section: Rtsm (2015) Run-time System Manager (Rtsm)mentioning
confidence: 99%
“…The tasks of hardwareabstraction and resource-access-standardization are usually carried out by an Operating System (OS). This issue has been addressed by different research groups and different solutions have been proposed: a Run-Time System Manager (RTMS) [12] by Technical University of Crete; SPREAD [13], a Streaming-Based Partially Reconfigurable Architecture and Programming Model proposed by Wang et al; FUSE [14], a Front-end USEr framework developed in Canada at the Simon Fraser University are some of the latest frameworks and OS extensions that target reconfigurable platforms.…”
Section: Introductionmentioning
confidence: 99%