Hardware software SoC co‐design analysis and implementation of MIMO‐OFDM for 4G/5G/6G eNodeB applications

Abstract

With the emerging challenges for the data rate requirements of 5G/6G applications and reusing the 4G infrastructure for 5G, it is necessary to understand the System‐on‐Chip (SoC) platform‐based embedded co‐design and implementation of the programmable and reconfigurable MIMO‐OFDM system. For both uplink and downlink data transmissions, these applications require a larger data throughput as well as reduced bit error rates, latency, and increased spectral efficiency. This work describes the co‐design and development of hardware and software for the MIMO‐OFDM algorithms for 5G and 6G eNodeBs. An efficient design through computer architecture based on pipeline and parallelization using systolic and CORDIC has been applied for the IP development of the sub‐components of the MIMO‐OFDM systems. A Zynq platform with computing resources including PS, Mali GPU‐400, and PL is utilized to increase the data rate for MIMO‐OFDM system architecture co‐design and implementation. The architecture approach used in this work enabled a data rate of 10–50 Gbps and beyond reaching Tbps based on the system's programmability and reconfigurability with an efficient SoC platform design. The design platform provides a programming feature such as MIMO‐OFDM, OFDM, and MIMO without OFDM through software programming for the range of applications of the desired data rates. With 64‐QAM modulation, the three channels' observed performance in the predicted multipath channel velocity of 15 km/h for pedestrians, vehicles, and AWGN is seen in simulation. To reach the application clock frequencies, the device's PLL (ZUI7EG) upscales and downscales clock frequencies from 750 to 1600 MHz using a configurable register. When the system is configured to operate as MIMO‐OFDM or OFDM in order to get an execution throughput of 300 msec and a data throughput ranging from 71 Gbps to 1749 Gbps using 2 × 2/4 × 4 configurations. The device scalability depends on at present devices of advanced embedded reconfigurable architecture platform. Massive MIMO and multi‐user MIMO will be used in the future to increase throughput and data rates. Additionally, future work will focus on creating a MIMO‐OFDM hardware‐software embedded architecture and testbed to enhance implementation and verification of the vehicle and pedestrian.