Hardware Realization of 2-D General Model State Space Systems

Abstract

In this paper, a hardware oriented realization, for the real time two dimensional (2-D) state space general model systems, is proposed. The proposed design of 2-D systolic array utilizes processing elements (PEs) which is simpler in use. The number of PEs is made equal to the multiplication of both the number of rows and column of the considered architecture. The proposed architecture provides excellent performance in terms of speed, efficiency and accuracy. Further, different designs of PEs are also proposed for state space feedback controller and unified structure. The unified structure can be work as state space systems as well as feedback controller after applying some control signals. It is shown that the area of unified structure is slightly more than that of structure-I and II taken separately. The ASIC synthesis results shows the proposed unified structure for system/controller of order 7 has taken approx 22% more area and 50% less area than state space system and controller with feedback respectively. Finally, the proposed architecture is implemented and analyzed using Verilog-HDL and Synopsis Design Compiler with 90nm TSMC target libraries.Keyword -2-D system, FM model, General model, state space filter realization, Synopsis Design Compiler, Verilog.I. INTRODUCTION The recent past have seen a continuously going research interests in the area of two-dimensional (2-D) discrete systems, due to their theoretical and practical viability in many application areas such as weather signal, seismographic data processing signal, mechanical vibration signal, remote sensing and telemetry signals, radio astronomy signal, biomedical system, navigation signals, gas absorption, water stream heating, radar and mobile signals etc. [1][2][3]. In a 2-D discrete system, information propagates in two independent directions, thereby making the system dynamics a function of two independent integer variables. The state-space methods have long outlived the other conventional methods to represent and analyze the practical systems. Motivated by this, many authors have attempted to describe the 2-D filter behavior in terms of linear state-space models [4][5][6][7][8]. In this paper, we consider the 2-D General state-space model [9] because many other popular state-space models can be represented as a special case of the General model.Rapid developments in VLSI design and computing technology have attracted many researchers [10-13] to study and analyze the hardware architectures for 2-D state-space filtering. In [10], high speed VLSI architecture is proposed for the realization of 2-D recursive filters. The Local state-space realization of the generalized 2-D filter transfer function is obtained by mapping its signal flow graph to the 2-D state-space model. The 2-D recursive digital filter represented by a 2-D block state-space model is considered in [11] and a pipelined SIMD architecture is developed for the purpose of 2-D block processing. This type of architecture is particularly useful when similar operations on a large set of da...

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