Hardware Random Number GeneratorUsing FPGA

Abstract

Random numbers are employed in wide range of cryptographic applications. Output of an asynchronous sampling of ring oscillators can be used as the source of randomness and Linear Hybrid Cellular Automata is used to improve the quality of random data. FPGA is an ideal platform for the implementation of random number generator for cryptographic applications. The circuit described in this paper has been implemented on a highly efficient FPGA board which generated a 32-bit random number at a frequency of 125 MHz. The generated sequence of random numbers were subjected to Diehard test and NIST test for testing randomness and found to pass these tests. These tests are a battery of statistical tests for measuring the quality of a random number generator.

XORSHIFTUL+: A Novel Hybrid Random Number Generator for Internet Of Things And Wireless Sensor Network Applications

“…A circuit is implemented to generate random numbers on a highly efficient FPGA card that generates 32-bit random numbers operating at a frequency of 125 MHz by Devi et al [30]. These random numbers were tested with Diehard and NIST.…”

“…We generated numbers and checked the result. xorshiftUL+ satisfies this condition with the probability of 0.917 2 16 < P (RN16 = j)) < 1.048 2 16 for 2 30 numbers. Secondly, simultaneously identical sequences' probability for 10000 tags should be less than 0.1%.…”

“…Three conditions of EPCGen2 standard as pointed out in the EPC™ Gen-2 Class 1 document [38] were examined, to ensure that it meets the RFID tags' security standards. Firstly, we know that each 16-bit random number selected (RN16 16bit random number) from generated 2 30 numbers should have the probability of . Proposed HRNG should satisfy this condition.…”