Hardware Masking, Revisited

Cnudde, Thomas De; Ender, Maik; Moradi, Amir

doi:10.46586/tches.v2018.i2.123-148

Cited by 27 publications

(19 citation statements)

References 25 publications

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“…Some problems such as glitches are of more physical nature but can be prevented at the algorithmic level [13], [14]. Eventually, couplings [15], [16], [17] and a lack of noise in the leakages [18], [19] require lower-level abstractions for their analysis and can only be mitigated thanks to implementation tweaks.…”

Section: Introduction 1state-of-the-art and Research Problemmentioning

confidence: 99%

Efficient Profiled Side-Channel Analysis of Masked Implementations, Extended

Bronchain

Durvaux

Masure

et al. 2022

IEEE Trans.Inform.Forensic Secur.

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We extend the study of efficient profiled attacks on masking schemes initiated by Lerman and Markowitch (TIFS, 2019) in different directions. First, we study both the profiling complexity and the online attack complexity of different profiled distinguishers. Second, we extend the range of the noise levels of their experiments, in order to cover (higher-noise) contexts where masking is effective. Third, we further contextualize the investigated distinguishers (e.g., in terms of adversarial capabilities and a priori assumptions on the leakage probability density function). Finally, we complete the list of distinguishers considered in this previous work and add expectation-maximization, soft analytical side-channel attacks and multi-layer perceptrons in our comparisons. Our results allow shedding an interesting new light on the respective strengths and weaknesses of these different statistical tools, both in the context of a side-channel security evaluation and for concrete attacks. In particular, they confirm the experimental relevance of evaluation shortcuts leveraging the masking randomness during profiling, in order to speed up the evaluation process.

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Section: Introduction 1state-of-the-art and Research Problemmentioning

confidence: 99%

Efficient Profiled Side-Channel Analysis of Masked Implementations, Extended

Bronchain

Durvaux

Masure

et al. 2022

IEEE Trans.Inform.Forensic Secur.

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“…Employing a climate chamber is suggested to address these temperature-dependent variations in static power measurement setup [7], [8]. De Cnudde et al [9] focus on the impact of temperature on the first-order leakage from masking schemes; yet does not consider aging impacts. The effect of temperature on static power leakage is also investigated in [10] and [11].…”

Section: Comparison With the State-of-the-artmentioning

confidence: 99%

On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments

Anik,

Danger,

Guilley

et al. 2024

IEEE Trans. VLSI Syst.

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Profiling side-channel analysis (SCA) attacks have received a lot of attention in the recent years. To perpetrate these attacks, the adversary creates a profile of a sensitive device at her disposal, and uses it to model a target device with a similar implementation to extract its key. Template attacks are recognized to be the most powerful profiling attacks when the measurement noise is Gaussian. To tackle SCA attacks, different countermeasures have been proposed in the literature, among which masking schemes have received the utmost attention. By adding randomness to the circuit, masking schemes prevent the adversary from relating the power consumption to the evaluated data, thus making the attack more difficult. In this article, we study the protection provided by several masking schemes against template attacks. More precisely, we investigate how the success of the template attack is changed when there is a misalignment between the target and profiling devices in terms of temperature and process variations. As another innovative analysis angle, we extensively study the impact of device aging on the template attack and demonstrate quantitatively how aging misalignments in side-channel traces, between the profiling and the target devices, do hinder the attack. The main objective of this study is to get accurate and numerous results allowing the designer to compare different implementations of masking and accordingly choose one which corresponds to the best compromise among complexity, security, and sensitivity to temperature and aging. We target the S-Box module of the unprotected PRESENT cipher along with its five masking variants including global lookup table (GLUT), rotating S-Box masking (referred to as RSM-LOG hereafter), RSM with read-only memory (RSM-ROM), Ishai-Sahai-Wagner masking (ISW), and threshold implementation (TI). The unprotected circuit gets impacted by such aging misalignments with ≈12.5% increase in the number of traces needed to reach 80% success rate (SR) in the course of 20 weeks of aging at 105 • C. Such increase is 23.3%, 37.19%, and 38.24% for ISW, GLUT, and RSM-LOG, respectively. For RSM-ROM such increase is 193.37% for ten weeks of aging. Interestingly, TI is not much affected by aging in this regard.

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“…Recent work demonstrated how first-order secure implementations on an FPGA can become vulnerable under high temperature, high voltage, and high clock frequency due to coupling effects [DEM18]. Levi et al [LBS19] further demonstrated how the couplings can be externally amplified to break the assumptions of provable security.…”

Section: Empirical Vs Provably-secure Maskingmentioning

confidence: 99%

ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking

Dubey

Ahmad

Pasha

et al. 2021

TCHES

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Intellectual Property (IP) thefts of trained machine learning (ML) models through side-channel attacks on inference engines are becoming a major threat. Indeed, several recent works have shown reverse engineering of the model internals using such attacks, but the research on building defenses is largely unexplored. There is a critical need to efficiently and securely transform those defenses from cryptography such as masking to ML frameworks. Existing works, however, revealed that a straightforward adaptation of such defenses either provides partial security or leads to high area overheads. To address those limitations, this work proposes a fundamentally new direction to construct neural networks that are inherently more compatible with masking. The key idea is to use modular arithmetic in neural networks and then efficiently realize masking, in either Boolean or arithmetic fashion, depending on the type of neural network layers. We demonstrate our approach on the edge-computing friendly binarized neural networks (BNN) and show how to modify the training and inference of such a network to work with modular arithmetic without sacrificing accuracy. We then design novel masking gadgets using Domain-Oriented Masking (DOM) to efficiently mask the unique operations of ML such as the activation function and the output layer classification, and we prove their security in the glitch-extended probing model. Finally, we implement fully masked neural networks on an FPGA, quantify that they can achieve a similar latency while reducing the FF and LUT costs over the state-of-the-art protected implementations by 34.2% and 42.6%, respectively, and demonstrate their first-order side-channel security with up to 1M traces.

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Hardware Masking, Revisited

Cited by 27 publications

References 25 publications

Efficient Profiled Side-Channel Analysis of Masked Implementations, Extended

Efficient Profiled Side-Channel Analysis of Masked Implementations, Extended

On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments

ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking

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