Hardware Implementation of Neural Self-Interference Cancellation

Abstract

In-band full-duplex systems can transmit and receive information simultaneously on the same frequency band. However, due to the strong self-interference caused by the transmitter to its own receiver, the use of non-linear digital selfinterference cancellation is essential. In this work, we describe a hardware architecture for a neural network-based non-linear self-interference (SI) canceller and we compare it with our own hardware implementation of a conventional polynomial based SI canceller. In particular, we present implementation results for a shallow and a deep neural network SI canceller as well as for a polynomial SI canceller. Our results show that the deep neural network canceller achieves a hardware efficiency of up to 312.8 Msamples/s/mm 2 and an energy efficiency of up to 0.9 nJ/sample, which is 2.1× and 2× better than the polynomial SI canceller, respectively. These results show that NNbased methods applied to communications are not only useful from a performance perspective, but can also be a very effective means to reduce the implementation complexity.