Hardware Implementation of Modeling Frequency Coded Serial Communication for Eurobalise Using ASK Module

Abstract

This paper discusses about the modeling of frequency coded serial communication for the application of Eurobalise on hardware-based field programmable gate array (FPGA). The transceiver consists of FPGA and the ultra-high frequency (UHF) band amplitude shift keying (ASK) module. In the convention interface of the ASK transceiver module with the digital controller, noise has introduce into the channel. The noise in the output of ASK receiver has distorted the transmitted data causing the throughput of the wireless channel to be decreased. When the ASK module interfaces with the FPGA device, the noise from the output of the ASK receiver causing the receiving FPGA retarded. The purpose of the frequency coded serial data is to provide continuous specific frequency pulse train to the ASK transmitter. The original serial bit stream is then modulated in the pulse train with different frequency corresponding to the bit’s logic level. This technique has made the output of the ASK receiver to produce a very clean signal with extremely less noise. Hence, the receiver’s FPGA able to capture all the transmitted data accurately across traditional disciplinary boundaries, including computer hardware, algorithms, electronics interfacing and application domain.