Hardware Implementation of Elliptic Curve Point Multiplication over GF(2m) for ECC protocols

Amara, Moncef; Siad, Amar

doi:10.20533/ijisr.2042.4639.2012.0013

Cited by 7 publications

(1 citation statement)

References 4 publications

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“…FPGAs are reprogrammable silicon chips which consists of a prebuilt logic blocks and a programmable routing resources [31]. FPGA offers higher flexibility, lower design time, easily available to everyone in the market, and lower non-recurring engineering costs as compared with application specific integrated circuits (ASICs) [11].…”

Section: Fpgamentioning

confidence: 99%

FPGA Based Crypto Processor for Elliptic Curve Point Multiplication (ECPM) Over GF(2233)

Imran¹,

Shehzad²

2017

IJISR

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Elliptic Curve Cryptography (ECC), provides all public key cryptographic primitives like digital signatures and key agreement algorithms/protocols in a constrained applications such as wireless sensor networks and radio frequency identification networks (RFIDs). In order to achieve digital signatures and key agreements, point/scalar multiplication is necessary to perform. However, we demonstrate the hardware architecture of elliptic curve point multiplication for low area constrained applications over binary (2) field with = 233 bit field size. The lower area is achieved, by using single hybrid karatsuba multiplier for both squarer and multiplication computations. The novel architecture is modeled in Verilog (HDL) using Xilinx (ISE) design tool and synthesized for Virtex 7 fieldprogrammable-gate-array (FPGA). Moreover, it achieves a maximum operational frequency of 157MHz and utilizes only 11849 FPGA slices.

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Section: Fpgamentioning

confidence: 99%