2018
DOI: 10.1109/tcsii.2018.2807362
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Hardware-Efficient Node Processing Unit Architectures for Flexible LDPC Decoder Implementations

Abstract: In LDPC decoder implementations, the architecture of the Node Processing Units (NPUs) has a significant impact both on the hardware resource requirements and on the processing throughput. Additionally, some NPU architectures impose limitations on the decoder's support for intra-or inter-standard LDPC code flexibility at run-time. In this paper, we present a generalised algorithmic method of constructing NPUs that support run-time flexibility whilst maintaining a low hardware resource requirement and high maxim… Show more

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Cited by 11 publications
(5 citation statements)
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“…The proposed FC requires M number of LDPC decoders and hence our future work will consider hardware efficient implementation of this. Among the state-of-the-art techniques for channel coding, LDPC decoding is widely considered to be the most hardware-efficient [40], [41]. In the proposed WSN scheme, all sensors transmit messages comprising the same number T of bits, which presents an opportunity for parallel LDPC decoding to be used.…”
Section: Discussionmentioning
confidence: 99%
“…The proposed FC requires M number of LDPC decoders and hence our future work will consider hardware efficient implementation of this. Among the state-of-the-art techniques for channel coding, LDPC decoding is widely considered to be the most hardware-efficient [40], [41]. In the proposed WSN scheme, all sensors transmit messages comprising the same number T of bits, which presents an opportunity for parallel LDPC decoding to be used.…”
Section: Discussionmentioning
confidence: 99%
“…The research on JSCC systems has become more popular [49]- [54], but the feasibility of implementing a JSCC system at the circuit level is rarely mentioned. As a sub-class of LDPC codes [44], [55]- [58], QC-LDPC, where the parity check matrix is composed of permutation matrices (CPMs), can contribute to effective partial-parallel processing, due to the regularity of their parity check matrices H H H. For telecommunication, there have been comprehensive studies [59]- [61] on improving the complexity and accuracy of the LDPC decoders. They applied appropriate calculations [62]- [64] and various structures of LDPC codes [65]- [68].…”
Section: Joint Source Channel Coding and Its Prototypementioning
confidence: 99%
“…This method also aids in shortening the time required to evaluate and test the variable node and check node designs. Besides [50], a generalized algorithmic method of constructing node processing units (NPUs) supports flexibility in run-time while keeping small hardware alternative demands and a large operating frequency and support for flexibility in inter or intra-standard LDPC at operating time.…”
Section: Related Workmentioning
confidence: 99%