Hardware Circuit Implementation and Performance Analysis of Three-Slot NP-CSMA

Abstract

The development of wireless communication technology has become increasingly important in the communications industry. How to allocate limited channel resources reasonably and reliably to each competing user is a problem that the access protocol of the MAC (Multiple Access Control) layer needs to solve. As an important way of random access, NP-CSMA (Non Persistent Carrier Sense Multiple Access) has a higher network throughput rate when the arrival rate is higher. This paper analyzes and improves the implemented NP-CSMA model, and obtains a three-slot NP-CSMA model. The mathematical tool MATLAB is used to analyze the network throughput, delay and energy efficiency of the model, and compare several random multiple access protocols adheres to the network throughput, they are NP-CSMA, Three-slot NP-CSMA, 1-persistent CSMA, P-persistent CSMA, and concludes that the three-slot NP-CSMA is significantly letter than several other multiple access protocols. Finally, using Quartus to design the three-slot NP-CSMA circuit, the statistical value of the circuit system is compared with the theoretical value of the model, and the error is less than 0.01, which proves that the system is reasonable in design and can be applied to wireless communication networks.

Hardware implementation and performance analysis of MPTD‐CSMA protocol based on field‐programmable gate array in VANET

“…If the information transmission site is not differentiated, some channels will be in collision state due to the frequent access of a large number of information packets, and some channels will be in the idle state due to the lack of information packet access for a long time, resulting in a waste of channel resources. To make more reasonable use of channel resources, a different priority is set for different transmitting stations to increase channel utilisation [38]. The multi‐priority model is shown in Fig.…”

“…The node with priority 1 only accesses channel 1, and the node with priority 2 can access channels 1 and 2, and so on. The node with priority N can access channel 1 to channel N [38].…”

“…According to the model analysis of improved MPTD‐CSMA protocol, the protocol framework of MPTD‐CSMA based on FPGA is shown in Fig. 13 [38].…”

“…The channel detection module realises the detection and classification of channel state through hardware language programming; the channel access strategy allocation module allocates appropriate channel access strategy for information packets according to the detected channel state; the control module of transmission timeslot allocates different timeslot length for information packets under different channel states; the receiving and statistics module allocates the received information packets statistics of the situation. According to the statistical results, the throughput and delay performance of the hardware system based on FPGA are calculated [38]. Next, each functional module is introduced one by one.…”

“…In Fig. 14, MATLAB generates Poisson data source and stores it in Quartus ‘read‐only memory (ROM)’ module and then completes Poisson data access under the control of count5000 [38]. MATLAB is adopted to generate the Poisson data source because it is capable of generating random Poisson data, and the generated data can be read by Quartus.…”