Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors

Arora, Divya; Ravi, S.; Raghunathan, Anand; Jha, Niraj K.

doi:10.1109/tvlsi.2006.887799

Cited by 71 publications

(49 citation statements)

References 13 publications

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“…In these presented approaches, the methods to detect anomalies depend on monitoring the control flow execution of an application [7,8,24,25] or rely on instruction-based monitoring [26][27][28]. In the former, static analysis of expected program behavior is extracted and then used by hardware monitors to observe the program's execution trace.…”

Section: Prior Workmentioning

confidence: 99%

Hardware-Based Run-Time Code Integrity in Embedded Devices

2018

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Attacks on embedded devices are becoming more and more prevalent, primarily due to the extensively increasing plethora of software vulnerabilities. One of the most dangerous types of these attacks targets application code at run-time. Techniques to detect such attacks typically rely on software due to the ease of implementation and integration. However, these techniques are still vulnerable to the same attacks due to their software nature. In this work, we present a novel hardware-assisted run-time code integrity checking technique where we aim to detect if executable code resident in memory is modified at run-time by an adversary. Specifically, a hardware monitor is designed and attached to the device's main memory system. The monitor creates page-based signatures (hashes) of the code running on the system at compile-time and stores them in a secure database. It then checks for the integrity of the code pages at run-time by regenerating the page-based hashes (with data segments zeroed out) and comparing them to the legitimate hashes. The goal is for any modification to the binary of a user-level or kernel-level process that is resident in memory to cause a comparison failure and lead to a kernel interrupt which allows the affected application to halt safely.

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Section: Prior Workmentioning

confidence: 99%

Hardware-Based Run-Time Code Integrity in Embedded Devices

2018

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“…For example, [10] describes a CF method, where the CFG is implemented in a FSM and the lookup table for resolving the control flow instruction addresses and indexes is implemented in memories.…”

Section: Control Flow (Cf) Methodsmentioning

confidence: 99%

“…Related work on control flow checking can be divided into approaches using an additional hardware checker unit or a watchdog processor [6][7][8][9][10], and approaches which are completely software-based [11]. In these approaches, the program code is first structured into basic blocks 1 .…”

Section: Related Workmentioning

confidence: 99%

“…When leaving a basic block, the signatures can be compared and errors inside the basic block can be found. Signature methods can be divided into two groups, namely Embedded Signature Monitoring (ESM) [6][7][8] and Autonomous Signature Monitoring (ASM) [9,10].…”

Section: Related Workmentioning

confidence: 99%

“…An ASM approach for security applications is described in [10]. The IntraProcedural Control Flow Checking is similar to our method.…”

Section: Related Workmentioning

confidence: 99%

See 2 more Smart Citations

Concepts for Autonomous Control Flow Checking for Embedded CPUs

Ziener

Teich

Lecture Notes in Computer Science

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Abstract. In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoiding the execution of faulty control flow instructions is a problem of growing importance w.r.t. reliability and security. On the other hand, hardware cost overheads and an easy integration into the design flow are of utmost important for cost sensitive embedded systems. Our proposed methodology is able to monitor all direct jumps and branches as well as calls and returns form subroutines autonomously during program execution. Furthermore, we propose and evaluate an implementation of an autonomous checker unit which is closely coupled to the processor and can detect and even avoid the execution of a faulty control flow instruction. Upon detection of a faulty instruction, we propose a method to refetch and reexecute the incorrect jump or branch instruction. Other benefits of this novel approach are that the application code must not be changed or augmented by signatures or additional instructions, and that there is no measurable performance impact in terms of execution latency. From the user point of view, our approach is completely transparent to a program developer.

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FastCFI: Real-Time Control Flow Integrity Using FPGA Without Code Instrumentation

Feng

Huang

et al. 2019

Runtime Verification

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Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors

Cited by 71 publications

References 13 publications

Hardware-Based Run-Time Code Integrity in Embedded Devices

Hardware-Based Run-Time Code Integrity in Embedded Devices

Concepts for Autonomous Control Flow Checking for Embedded CPUs

FastCFI: Real-Time Control Flow Integrity Using FPGA Without Code Instrumentation

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