Hardware and software architectures for computationally efficient three‐dimensional ultrasonic data compression

Govindan, Pramod; Wang, Boyang; Ravi, Prashaanth; Saniie, Jafar

doi:10.1049/iet-cds.2015.0083

Cited by 18 publications

(5 citation statements)

References 39 publications

(42 reference statements)

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“…However, the technique was not found benchmarked. Same authors [17] have extended the similar work using system-on-chip platform using OpenCL language over GPU. Medical images are not only limited to radiological images, but there are also other forms of it.…”

Section: Related Workmentioning

confidence: 92%

ROI-based Compression on Radiological Image by Urdhva-Tiryagbhyam and DWT Over FPGA

Suma¹,

Sridhar²

2017

ijacsa

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Abstract-The area of radiological image compression has not yet met its potential solution. After reviewing the existing mechanism of compression, it was found that majority of the existing techniques suffers from significant pitfalls e.g. more usage of transformation schemes, more resource utilization, delay, less focus on FPGA performance enhancement, extremely less emphasis on Vedic-multipliers. Hence, this paper presents an analytical modelling of ROI (Region of Interest)-based radiological image compression that applies Vedic Multiplier Urdhva-Tiryagbhyam to enhance the performance of coding using Discrete Wavelet Transform (DWT). The study outcome was implemented in Matlab and multiple test bed of FPGA devices (Virtex 4 FX100 -12 FF1152 and Spartan 3 XC400-5TQ144) and assessed using both visual and numerical outcomes to find that proposed system excel better performance in comparison to recently existing techniques.

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Section: Related Workmentioning

confidence: 92%

ROI-based Compression on Radiological Image by Urdhva-Tiryagbhyam and DWT Over FPGA

Suma¹,

Sridhar²

2017

ijacsa

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“…Various approaches to ultrasonic data compression have been reported, and the most common example among them is the transform-domain method using discrete wavelet transform (DWT), 4–7 mainly due to its high energy compaction properties. All these studies provide a satisfying compression ratio (CR′) as well as a high-quality signal reconstruction.…”

Section: Introductionmentioning

confidence: 99%

Compressive sensing of phased array ultrasonic signal in defect detection: Simulation study and experimental verification

Bai

Chen

Xiao

et al. 2017

Structural Health Monitoring

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Ultrasonic phased array techniques are widely used for defect detection in structural health monitoring field. The increase in the element number, however, leads to larger amounts of data acquired and processed. Recently developed compressive sensing states that sparse signals may be accurately recovered from far fewer measurements, suggesting the possibility of breaking through the sampling limit of the Nyquist theorem. In light of this significant advantage, the novel use of the compressive sensing methodology for ultrasonic phased array in defect detection is proposed in this work. Based on CIVA software, we first present a simulated study on the effectiveness of the compressive sensing applied in ultrasonic phased array in defect detection through the average mean percent residual difference at varying compression rates. The results particularly show that the compressive sensing yields a breakthrough of the sampling limitation. We then experimentally demonstrate comparative analyses on the signals extracted from three types of artificial flaws (through-hole, flat-bottom hole, and electrical discharge machining notches) on two different specimens (made of aluminum and 20# steel). To find the optimal algorithm combination, the best sparse representation basis is chosen among fast Fourier transform, discrete cosine transform, and 34 wavelet kernels; the reconstruction performance is compared between five greedy algorithms; and the recovery accuracy is further improved via four sensing matrices selection. We also evaluate the influence of the sampling rate, and our results are comparable with the gold standard of signal compression, namely, the discrete wavelet transform.

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“…A field programmable gate array (FPGA) based systemon-chip (SoC) is one of the available hardware platforms to implement the system to achieve real-time execution. There have been a lot of projects using FPGA-SoC especially in a medical field as an example in medical imaging [13], [14], [15], [16]. However, very limited works have been reported on the hardware implementation in the model simulation-based quantitative analysis for physiological processes studies.…”

Section: Introductionmentioning

confidence: 99%

A hardware acceleration based on high-level synthesis approach for glucose-insulin analysis

Daud¹,

Mahmud²,

Jabbar³

2017

AIP Conference Proceedings

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Abstract. In this paper, the research is focusing on Type 1 Diabetes Mellitus (T1DM). Since this disease requires a full attention on the blood glucose concentration with the help of insulin injection, it is important to have a tool that able to predict that level when consume a certain amount of carbohydrate during meal time. Therefore, to make it realizable, a Hovorka model which is aiming towards T1DM is chosen in this research. A high-level language is chosen that is C++ to construct the mathematical model of the Hovorka model. Later, this constructed code is converted into intellectual property (IP) which is also known as a hardware accelerator by using of high-level synthesis (HLS) approach which able to improve in terms of design and performance for glucose-insulin analysis tool later as will be explained further in this paper. This is the first step in this research before implementing the design into system-on-chip (SoC) to achieve a highperformance system for the glucose-insulin analysis tool.

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Hardware and software architectures for computationally efficient three‐dimensional ultrasonic data compression

Cited by 18 publications

References 39 publications

ROI-based Compression on Radiological Image by Urdhva-Tiryagbhyam and DWT Over FPGA

ROI-based Compression on Radiological Image by Urdhva-Tiryagbhyam and DWT Over FPGA

Compressive sensing of phased array ultrasonic signal in defect detection: Simulation study and experimental verification

A hardware acceleration based on high-level synthesis approach for glucose-insulin analysis

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