Hafnia-Based Double-Layer Ferroelectric Tunnel Junctions as Artificial Synapses for Neuromorphic Computing

Max, Benjamin; Hoffmann, Michael; Mulaosmanovic, Halid; Slesazeck, Stefan; Mikolajick, Thomas

doi:10.1021/acsaelm.0c00832

Cited by 101 publications

(120 citation statements)

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“…Subsequently, an I(V) sweep in the range +/-300 mV measures the resistance. In this section, we address both the programmability of the device for inference and its response under pulses of varying sign, amplitude and width, emulating the combination of presynaptic pulses (negative bias) and post-synaptic pulses (positive bias), described for example in [25] or [12].…”

Section: A Ferroelectric Memristormentioning

confidence: 99%

“…The resistive switching effect was also obtained using CMOS-compatible materials: the metastable, ferroelectric phase of hafnia [20]. In the work of Max et al [12] or Berdan et al [3], a 10 nm thick HfO2 layer is combined with an oxide interlayer acting as the tunnel barrier. The device operates under a read voltage as high as 2 V to allow transport across the HfO2 layer, and large "On/Off" ratios (ratio between the conductance in the low and high resistive states) are obtained.…”

Section: Introductionmentioning

confidence: 99%

“…experiments [11], [12]. Ferroelectric, analog memristors were can be fabricated with CMOS compatible materials in a threeterminals, ferroelectric field-effect geometry, where the resistance of a channel is tuned by electrostatic modulation of the carrier density [13], [14].…”

Section: Introductionmentioning

confidence: 99%

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Analog Resistive Switching in BEOL, Ferroelectric Synaptic Weights

Bégon‐Lours¹,

Halter

Popoff

et al. 2021

IEEE J. Electron Devices Soc.

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A Ferroelectric, two-terminals, analog memristive device is fabricated with a Back-End-Of-Line, CMOS compatible process. A bilayer composed of a ferroelectric material, HfZrO4 (HZO) and a semiconducting oxide, WOx layer is comprised between two TiN electrodes. The devices demonstrate reversible and remanent resistive switching, with a record endurance (>10 10 switching cycles) and ON/OFF ratio up to 10. The analog resistive switching is obtained, with a cycle-to-cycle reproducibility of 90%. The synaptic behavior is explored with pulses of varying sign, length, or amplitude. For the scheme with constant pulse width the linearity coefficients for the potentiation and depression are -1.4 and 4. The dynamics of the resistive switching is shown to be governed by the ferroelectric domains switching. Finally, temperature dependent transport measurements indicate Ohmic conduction at low bias and Modified Schottky Emission at larger bias. They provide insights on the role of defects and oxygen vacancies in the transport and resistive switching mechanisms.

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Section: A Ferroelectric Memristormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Analog Resistive Switching in BEOL, Ferroelectric Synaptic Weights

Bégon‐Lours¹,

Halter

Popoff

et al. 2021

IEEE J. Electron Devices Soc.

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“…The change in the polarization state, i.e., the change in the device resistance, is used to store information. It is possible to obtain multilevel storage in reasonably large devices hosting several domains by properly engineering the applied programming voltage [24,25]. Of particular interest is that FTJs allow for a non-destructive reading operation by applying an electric field smaller than the E c of the ferroelectric layer.…”

Section: Basic Device Operating Principlementioning

confidence: 99%

Ferroelectric-based synapses and neurons for neuromorphic computing

Covi

Mulaosmanovic

Max

et al. 2022

Neuromorph. Comput. Eng.

Self Cite

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The shift towards a distributed computing paradigm, where multiple systems acquire and elaborate data in real-time, leads to challenges that must be met. In particular, it is becoming increasingly essential to compute on the edge of the network, close to the sensor collecting data. The requirements of a system operating on the edge are very tight: power efficiency, low area occupation, fast response times, and on-line learning. Brain-inspired architectures such as Spiking Neural Networks (SNNs) use artificial neurons and synapses that simultaneously perform low-latency computation and internal-state storage with very low power consumption. Still, they mainly rely on standard complementary metal-oxide-semiconductor (CMOS) technologies, making SNNs unfit to meet the aforementioned constraints. Recently, emerging technologies such as memristive devices have been investigated to flank CMOS technology and overcome edge computing systems' power and memory constraints. In this review, we will focus on ferroelectric technology. Thanks to its CMOS-compatible fabrication process and extreme energy efficiency, ferroelectric devices are rapidly affirming themselves as one of the most promising technology for neuromorphic computing. Therefore, we will discuss their role in emulating neural and synaptic behaviors in an area and power-efficient way.

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“…in non-volatile SRAM (NV-SRAM) cells as discussed in section III B). However, for application as weighting elements in the analog vector-matrixmultiplication based on Ohm's and Kirchhoff's law [23] or as synaptic weighting element [24], a gradual switching is important to attain multiple intermediate resistance states. Hence, not only a proper selection of the programming voltages that are constrained by the CMOS technology, but a suitable choice of the programming pulse width is very important and has to be adapted to the specific FTJ device.…”

Section: B Ftj Programming Characteristicsmentioning

confidence: 99%