Growth kinetics and microstructural evolution of Cu-Sn intermetallic compounds on different Cu substrates during thermal aging

Liu, Z. Q.; Shang, Pan; Li, D. X.; Shang, Jian Ku

doi:10.1109/icept.2009.5270685

Cited by 3 publications

(2 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…With an obvious influence on bond strength in Cu/Sn TLP bonding, voids create issues also in terms of electrical conductivity in 3D interconnects applications or sealing performance when used for vacuum encapsulation of devices. Voids, or "pores", have been reported to occur either inside the terminal IMC volume or at the Cu/Cu 3 Sn interfaces and several mechanisms of voids formation have been proposed (3)(4)(5)(6)(7)(8). For convenience, we distinguish two types of voids:…”

Section: Theorymentioning

confidence: 99%

See 1 more Smart Citation

Cu-Sn Transient Liquid Phase Wafer Bonding: Process Parameters Influence on Bonded Interface Quality

Floetgen¹,

Corn²,

Pawlak³

et al. 2013

ECS Trans.

View full text Add to dashboard Cite

Cu-Sn Transient Liquid Phase (TLP) wafer-level bonding is an interesting solution for wafer-to-wafer stacking technologies, due to its compatibility with 3D interconnections as well as vacuum sealing applications. The work presented here is analysing typical Cu-Sn TLP wafer bonding issues as occurrence of voids, bonded wafers pair bow and incomplete layer transformation with respect to process parameters as maximum bonding temperature, bonding time and contact (bonding) pressure.

show abstract

Section: Theorymentioning

confidence: 99%

“…Another important topic which has to be taken into account in process development is the prevention of voids in the interface. There have been many mechanisms for void formation proposed in the literature (3)(4)(5)(6)(7)(8). Voids have been found inside the terminal IMC volume as well at the Cu/Cu 3 Sn interfaces.…”

Section: Introductionmentioning

confidence: 99%