Green-CM: Energy Efficient Contention Management for Transactional Memory

Issa, Shady; Romano, Paolo; Brorsson, Mats

doi:10.1109/icpp.2015.64

2015 44th International Conference on Parallel Processing 2015

DOI: 10.1109/icpp.2015.64

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Green-CM: Energy Efficient Contention Management for Transactional Memory

Shady Issa

Paolo Romano

Mats Brorsson

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Cited by 2 publications

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CPU-core frequency scaling for efficient thread scheduling in transactional memories

Sanzo

Ciciani

2016

2016 International Conference on High Performance Computing &Amp; Simulation (HPCS)

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Transaction Memory systems may suffer from performance degradation when the concurrency level grows. The transaction abort rate caused by high concurrency may be detrimental to energy efficiency as well. Thread scheduling techniques, which proactively block some threads to optimize the concurrency level, help to reduce these phenomena. In this paper, we show\ud that the efficiency of mechanisms used by tread schedulers for blocking/unblocking concurrent threads can be improved using CPU-core frequency scaling options offered by modern hardware systems. Particularly, we study a low-frequency busy waiting approach, in which blocked threads scale down the frequency of CPU-cores where they are running. We compare this approach with two commonly used approaches by thread schedulers, and we demonstrate that it achieves the best results in term of both performance and energy efficiency

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CPU-core frequency scaling for efficient thread scheduling in transactional memories

Sanzo

Ciciani

2016

2016 International Conference on High Performance Computing &Amp; Simulation (HPCS)

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Speculative Read Write Locks

Issa

Romano

Lopes

2018

Proceedings of the 19th International Middleware Conference

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Green-CM: Energy Efficient Contention Management for Transactional Memory

Cited by 2 publications

References 24 publications

CPU-core frequency scaling for efficient thread scheduling in transactional memories

CPU-core frequency scaling for efficient thread scheduling in transactional memories

Speculative Read Write Locks

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