GPU Implementation of Bitplane Coding with Parallel Coefficient Processing for High Performance Image Compression

Abstract

Abstract-The fast compression of images is a requisite in many applications like TV production, teleconferencing, or digital cinema. Many of the algorithms employed in current image compression standards are inherently sequential. High performance implementations of such algorithms often require specialized hardware like field integrated gate arrays. Graphics Processing Units (GPUs) do not commonly achieve high performance on these algorithms because they do not exhibit fine-grain parallelism. Our previous work introduced a new core algorithm for wavelet-based image coding systems. It is tailored for massive parallel architectures. It is called bitplane coding with parallel coefficient processing (BPC-PaCo). This paper introduces the first high performance, GPU-based implementation of BPC-PaCo. A detailed analysis of the algorithm aids its implementation in the GPU. The main insights behind the proposed codec are an efficient thread-to-data mapping, a smart memory management, and the use of efficient cooperation mechanisms to enable interthread communication. Experimental results indicate that the proposed implementation matches the requirements for high resolution (4K) digital cinema in real time, yielding speedups of 30× with respect to the fastest implementations of current compression standards. Also, a power consumption evaluation shows that our implementation consumes 40× less energy for equivalent performance than state-of-the-art methods.

GPU-Oriented Architecture for an End-to-End Image/Video Codec Based on JPEG2000

“…To use the JPEG2000's bitplane and arithmetic coder would significantly hinder the throughput of the GPU, so this is the only stage that is not compliant with the standard. This stage is replaced by the coding engine proposed in [44], [45]. The aim of our codec is to code large quantities of images.…”

“…Second, the warp efficiency is 63% due to the multiple divergent paths of the algorithm. Third, the memory bandwidth is much lower than that achieved by the other kernels since BPC_AC(•) is bounded by the latency of the computing instructions [45]. Fourth, the time spent for coding a 2K and 4K frame is not proportional to the frame size.…”

“…Even so, there have been efforts to implement this stage in GPUs [34]- [40], though these solutions do not to fully occupy the resources of the GPU due to the lack of fine-grain parallelism. In 2014, we started a line of research [41]- [45] focused on providing fine-grain parallelism to this stage without sacrificing any feature of the system. The goal was not to implement the compliant JPEG2000 algorithm, but to redevise it keeping in mind the SIMD architecture of GPUs.…”

Utilización de GPU-CUDA en el Procesamiento Digital de Imágenes

“…La compresión de imágenes tiene como finalidad representar la información en el menor número de bits posible, pero de igual o mayor importancia es la descompresión o recuperación de la información original en aplicaciones como teleconferencia, cinema digital, etc. en (Enfedaque, Auli-Llinas and Moure, 2017) se propone el uso de GPU para mejorar los tiempos de procesamiento en estas aplicaciones, logrando obtener hasta 30x de mejora para aplicaciones de alta resolución (4K).…”

High-Throughput Variable-to-Fixed Entropy Codec Using Selective, Stochastic Code Forests

“…HT codecs produce compact representations of input data, prioritizing the rate at which samples are processed over the achieved compression ratios -i.e., the quotient between the original and compressed data sizes. Even though HT can be attained via massive parallelization [11]- [14], low-complexity compression pipelines are often employed…”