Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook

Krstić, Miloš; Grass, Eckhard; Gürkaynak, Frank K.; Vivet, Pascal

doi:10.1109/mdt.2007.164

Cited by 160 publications

(67 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The NoC paradigm has introduced new energy-efficient networks with lower latencies and better performances overall for transferring data in SoCs. An interesting category of NoCs is the asynchronous NoCs (ANoCs) [9], which are mainly implemented in globally asynchronous locally synchronous (GALS) [10,11] architectures-especially for sub-micron technologies. Thanks to the nature of asynchronous logic, these networks can bypass problems caused by the clocking distribution in an SoC, such as clock skew.…”

Section: Introductionmentioning

confidence: 99%

Ultra Low Energy FDSOI Asynchronous Reconfiguration Network for Adaptive Circuits

Chairat¹,

Beigné²,

Miro-Panades³

et al. 2017

JLPEA

View full text Add to dashboard Cite

This paper introduces a plug-and-play on-chip asynchronous communication network aimed at the dynamic reconfiguration of a low-power adaptive circuit such as an internet of things (IoT) system. By using a separate communication network, we can address both digital and analog blocks at a lower configuration cost, increasing the overall system power efficiency. As reconfiguration only occurs according to specific events and has to be automatically in stand-by most of the time, our design is fully asynchronous using handshake protocols. The paper presents the circuit's architecture, performance results, and an example of the reconfiguration of frequency locked loops (FLL) to validate our work. We obtain an overall energy per bit of 0.07 pJ/bit for one stage, in a 28 nm Fully Depleted Silicon On Insulator (FDSOI) technology at 0.6 V and a 1.1 ns/bit latency per stage.

show abstract

Section: Introductionmentioning

confidence: 99%

Ultra Low Energy FDSOI Asynchronous Reconfiguration Network for Adaptive Circuits

Chairat¹,

Beigné²,

Miro-Panades³

et al. 2017

JLPEA

View full text Add to dashboard Cite

show abstract

“…which are automatically detected, are used to reveal suitable system partitions. Re-implementing the global communication of a chosen partition in asynchronous circuit, a software would be able to automatically convert a synchronous RTL system into a globally asynchronous and locally synchronous (GALS) system [4]. It is well known that asynchronous circuits can be used to reduce energy consumption and resolve the global clock issues [4]- [6].…”

Section: Introductionmentioning

confidence: 99%

“…Re-implementing the global communication of a chosen partition in asynchronous circuit, a software would be able to automatically convert a synchronous RTL system into a globally asynchronous and locally synchronous (GALS) system [4]. It is well known that asynchronous circuits can be used to reduce energy consumption and resolve the global clock issues [4]- [6]. However, the current design flow is to manually partition the system, and then design the global asynchronous communication circuits by hands or using special asynchronous design tools, both of which are intimidating tasks to traditional synchronous hardware engineers.…”

Section: Introductionmentioning

confidence: 99%

Automatic Controller Detection for Large Scale RTL Designs

Song

Garside

2013

2013 Euromicro Conference on Digital System Design

View full text Add to dashboard Cite

Abstract-Automatic detection of the finite state machines (FSMs) in a register transfer level (RTL) design is a widely utilised technique in logical synthesis for optimised FSM implementation and in hardware verification for the fast coverage of the control circuit. It is believed that FSM detection can also be used to explore the potential system partitions. Chosen an optimal partition, a large scale synchronous RTL system can be automatically converted into energy efficient globally asynchronous and locally synchronous (GALS) systems. A new FSM detection algorithm is presented providing a full coverage of all FSM-like controllers. It uses several criteria to detect FSMs on a register level abstracted graph generated from the RTL design. It is the first FSM detection algorithm that provides full FSM detection in the granularity level of signals without any restrictions on coding styles.

show abstract

“…Asynchronous circuits [14] are well known for their low power consumption and tolerance to process, voltage and temperature variation [15]. Considering the high power consumption of current communication fabric and the increasing process variation, it is beneficial to implement high-radix routers asynchronously.…”

Section: Introductionmentioning

confidence: 99%

Routing of asynchronous Clos networks

Song

Edwards

Zuo

et al. 2011

IET Comput. Digit. Tech.

View full text Add to dashboard Cite

Abstract-Clos networks provide the theoretically optimal solution to build high-radix switches. Dynamically reconfiguring a three-stage Clos network is more difficult in asynchronous circuits than in synchronous circuits. This paper proposes a novel asynchronous dispatching (AD) algorithm for general three-stage Clos networks. It is compared with the classic synchronous concurrent round-robin dispatching (CRRD) algorithm in unbuffered Clos networks. The AD algorithm avoids the contention in central modules (CMs) using a state feedback scheme and outperforms the throughput of CRRD in behavioural simulations.Two asynchronous Clos networks using the AD algorithm are implemented and compared with a synchronous Clos network using the CRRD algorithm. The asynchronous Clos scheduler is smaller than its synchronous counterpart. Synchronous Clos networks achieve higher throughput than asynchronous Clos networks because asynchronous Clos networks cannot hide the arbitration latency and their data paths are slow. The asynchronous Clos scheduler consumes significantly lower power than the synchronous scheduler and the asynchronous Clos network using bundled-data data switches shows the best power efficiency in all implementations.

show abstract

Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook

Cited by 160 publications

References 15 publications

Ultra Low Energy FDSOI Asynchronous Reconfiguration Network for Adaptive Circuits

Ultra Low Energy FDSOI Asynchronous Reconfiguration Network for Adaptive Circuits

Automatic Controller Detection for Large Scale RTL Designs

Routing of asynchronous Clos networks

Contact Info

Product

Resources

About