2020 IEEE 40th International Conference on Electronics and Nanotechnology (ELNANO) 2020
DOI: 10.1109/elnano50318.2020.9088773
|View full text |Cite
|
Sign up to set email alerts
|

Genetic Programming of Pipelined Datapaths for FPGA

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
4
0

Year Published

2022
2022
2022
2022

Publication Types

Select...
2

Relationship

0
2

Authors

Journals

citations
Cited by 2 publications
(4 citation statements)
references
References 19 publications
0
4
0
Order By: Relevance
“…At the first stage of the synthesis according to the indicated method of the vertex-operator of the homogeneous spatial SDF together with arcs are located in three-dimensional space as sets of vectors Ki and Dj з taking into account the conditions given in [21]. At the same time, the coordinates of the vector Ki = (s,q,t) T mean the number s of PE, where the operator is executed, type q of PE and frequency component t, which is equal to the clock number in the algorithm execution period.…”
Section: Methods Of Synthesis Of Buffer Schemes Based On Spatial Spd ...mentioning
confidence: 99%
See 2 more Smart Citations
“…At the first stage of the synthesis according to the indicated method of the vertex-operator of the homogeneous spatial SDF together with arcs are located in three-dimensional space as sets of vectors Ki and Dj з taking into account the conditions given in [21]. At the same time, the coordinates of the vector Ki = (s,q,t) T mean the number s of PE, where the operator is executed, type q of PE and frequency component t, which is equal to the clock number in the algorithm execution period.…”
Section: Methods Of Synthesis Of Buffer Schemes Based On Spatial Spd ...mentioning
confidence: 99%
“…At the second stage, the spatial SDF is being balanced, which consists in adding delay vertices to the arcs of the graph until the time components of all vectors Dj are equal to 0 or 1. After that, the spatial SDF is optimized by mutual permutations of vectors-vertices from one layer in order to minimize the number of registers and the number of multiplexer inputs in the resulting structure and/or using other strategies, for example, resynchronization [20] or using genetic programming [21]. Also, the number of registers is minimized by gluing delay vertices from the same tier that store the same operand.…”
Section: Methods Of Synthesis Of Buffer Schemes Based On Spatial Spd ...mentioning
confidence: 99%
See 1 more Smart Citation
“…The framework is able to perform the graphical input of SDF of the DSP algorithms with the given period L and data bit width. SDF can be optimized either manually or automatically using one of the genetic programming algorithms [40]. One of two strategies of the buffer design are used by the optimization as well.…”
Section: Synthesis Frameworkmentioning
confidence: 99%