2020
DOI: 10.1021/acssynbio.0c00055
|View full text |Cite
|
Sign up to set email alerts
|

Genetic Circuit Dynamics: Hazard and Glitch Analysis

Abstract: Multiple input changes can cause unwanted switching variations, or glitches, in the output of genetic combinational circuits. These glitches can have drastic effects if the output of the circuit causes irreversible changes within or with other cells such as a cascade of responses, apoptosis, or the release of a pharmaceutical in an off-target tissue. Therefore, avoiding unwanted variation of a circuit’s output can be crucial for the safe operation of a genetic circuit. This paper investigates what causes unwan… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

0
39
0

Year Published

2020
2020
2023
2023

Publication Types

Select...
6
2
2

Relationship

3
7

Authors

Journals

citations
Cited by 25 publications
(40 citation statements)
references
References 28 publications
0
39
0
Order By: Relevance
“…Such interdependency asks for enriched device models in libraries but will open up new interesting computational challenges for the circuit synthesis. Methods that account for intrinsic noise and for temporal aspects even for combinational logic, 37 such as rise times or simple reversibility of circuit responses, are also yet to be developed. Integrating the temporal properties of genetic circuits that are central for designing sequential logic circuits 3 into a consistent robust design and scoring framework is another challenge ahead.…”
Section: Discussionmentioning
confidence: 99%
“…Such interdependency asks for enriched device models in libraries but will open up new interesting computational challenges for the circuit synthesis. Methods that account for intrinsic noise and for temporal aspects even for combinational logic, 37 such as rise times or simple reversibility of circuit responses, are also yet to be developed. Integrating the temporal properties of genetic circuits that are central for designing sequential logic circuits 3 into a consistent robust design and scoring framework is another challenge ahead.…”
Section: Discussionmentioning
confidence: 99%
“…Despite the parameterization being based on static measurements, the equations can be used to predict the circuit dynamics; the response to a change in inputs that leads to a glitch is shown in Fig. 5a 94 . The steady-state solutions are determined and found to match all the circuit states, including all of the internal sensor/gate output promoters ( Fig.…”
Section: ) (Methods)mentioning
confidence: 99%
“…The mathematical model used in this work is explained and implemented in Fontanarrosa et al [35]. However, certain adaptations have been made to this model to be able to account for a "split" sensor gate in the design of the delay circuit.…”
Section: Mathematical Modelmentioning
confidence: 99%