Generic systolic arrays: A methodology for systolic design

Multivariate polynomial interpolation is a key computation in many areas of science and engineering and, in our case, is crucial for the solution of the reverse engineering of genetic networks modeled by finite fields. Faster implementations of such algorithms are needed to cope with the increasing quantity and complexity of genetic data. We present a new algorithm based on Lagrange interpolation for multivariate polynomials that not only identifies redundant variables in the data and generates polynomials containing only nonredundant variables, but also computes exclusively on a reduced data set. Implementation of this algorithm to FPGA led us to identify a systolic array-based architecture useful for performing three interpolation subtasks: Boolean cover, distinctness, and polynomial addition. We present a generalization of these tasks that simplifies their mapping to the systolic array, and control and storage considerations to guarantee correct results for input sequences longer than the array. The subtasks were modeled and implemented to FPGA using the proposed architecture, then used as building blocks to implement the rest of the algorithm. Speedups up to172×and67×were obtained for the subtasks and complete application, respectively, when compared to a software implementation, while achieving moderate resource utilization.

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“…array presented in [16], as shown in Algorithm 3. The notation F i [r] symbolizes the content of register F in cell r at iteration i.…”

Section: W(f M) S(f M) W(f M) S(f M) W(f M) S(f M)mentioning

confidence: 99%

Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm

Arce-Nazario

Orozco

Bollman

2010

International Journal of Reconfigurable Computing

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“…A remarkable alternate approach represents the methods based on viewing systolic design as program design. The work of Gribomont and Dongen [6] is based on the concept of generic systolic array, which means that it also makes use of the idea that the architecture of the systolic array is already chosen before the design process. However this method represents a programoriented methodology, and for the same reason it has a low degree of automation.…”

Section: Introductionmentioning

confidence: 99%

Functional-based synthesis of systolic online multipliers

Jebelean

Szakacs

2005

Seventh International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'05)

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Abstract-Systolic online algorithms for the multiplication of univariate polynomials and of multiple precision integers are synthesised using a novel method based on the following functional (or inductive) view: a systolic array is a head processor followed by an identical tail array. The synthesis method consists in first unfolding the functional expression of the target function until the first four elements are separated, and then by projecting the remaining list expression into the scalar space in order to obtain the transition function of the individual processors. The method is implemented as a set of rewrite rules in the Theorema system, and it generates the description of the systolic arrays in a completely automatic manner, starting from the functional definitions of the arithmetic operations.

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Generic systolic arrays: A methodology for systolic design

Cited by 2 publications

References 14 publications

Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm

Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm

Functional-based synthesis of systolic online multipliers

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