Generic Monitoring and Management Infrastructure for 3D NoC-Bus Hybrid Architectures

Rahmani, Amir-Mohammad; Vaddina, Kameswar Rao; Latif, Khalid; Liljeberg, Pasi; Plosila, Juha; Tenhunen, Hannu

doi:10.1109/nocs.2012.28

Cited by 12 publications

(5 citation statements)

References 16 publications

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“…3D Network-on-chip (3D NoC) [4], [5] has been proposed as a promising way to solve on-chip communication bottleneck. Topology [6], [7] and routing algorithm [8], [9], [10] have become two important parts of 3D NoC design. In 3D topology architectures [11], [12], [13], [14] different layers are connected using through silicon vias (TSVs) [15], [16].…”

Section: Introductionmentioning

confidence: 99%

DRTL: A heat-balanced deadlock-free routing algorithm for 3D topology network-on-chip

Wang

et al. 2016

Microprocessors and Microsystems

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Heat balance is of critical importance on the design of network-on-chip (NoC). In a 3D topology NoC, routing algorithm should take considerations of each layer's peak temperature and traffic to prolong chip's service life. In this paper, we propose a heat-balanced, deadlock-free routing algorithm named Direct Ratio Transport Layer (DRTL). DRTL distributes and arranges traffics according to the source layer and destination layer in order to achieve heat balance in the chip. In this algorithm, if a transition layer is needed, the probability of choosing a layer as the transition layer is inversely proportional to the distance between this layer and the heat sink. Simulation results showed that, compared with Traffic Aware Downward Routing (TADR), congestion is alleviated and the chip achieves good network performance when DRTL is used. Moreover, DRTL gets almost the same network performance as Transport Layer Assisted Routing (TLAR) does while the chip temperature can be lowered by 2K.

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Section: Introductionmentioning

confidence: 99%

DRTL: A heat-balanced deadlock-free routing algorithm for 3D topology network-on-chip

Wang

et al. 2016

Microprocessors and Microsystems

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“…In a multi-processors system, the cache-coherent shared memory protocols (such as directory-based or token-based) require one-to-many or broadcast communications to require shared data or invalidate shared data on diverse cache blocks [1]. It has been stated that only 3-5% multicast traffic will have a serious impact on system performance in the total network traffic [1].…”

Section: Introductionmentioning

confidence: 99%

Two Multicasting Schemes for Irregular 3D Mesh-based Bufferless NoCs

Yao

Cao

Zhang

et al. 2015

MATEC Web of Conferences

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INTRODUCTIONNowadays, the technology applications and programming models in the Multi-Processors System-on-Chip (MPSoC), the multicast communications and the broadcast communications are becoming common. In a multi-processors system, the cache-coherent shared memory protocols (such as directory-based or token-based) require one-to-many or broadcast communications to require shared data or invalidate shared data on diverse cache blocks [1]. It has been stated that only 3-5% multicast traffic will have a serious impact on system performance in the total network traffic [1]. Thus, the supporting multicast communication in NoC can enhance system performance significantly. However, for the moment, Multicasting chip router designs [2,3,4,5] are only on the buffer router. There is almost no router designs that sustains multicasting on the bufferless router.On the other hand, the following issues make the multicast communication more complicated. The first issue is the irregular topology structure. Applying virtualization [6] allows multiple applications mapping to different sub-network at the NoC level. The sub-network is often irregular and it negates regular routing algorithms, such as odd-even routing, XY routing and so on [7]. The other is many kinds of application communication behavior, such as embedded systems, desktop applications. As a result, the customized multicast routing approaches as the using routing tables may not suit to them.The 3D NoC architecture is widely studied in the network topology Shaojun WeiThe Department of Electronic Systems, Tsinghua University, Beijing, China ABSTRACT: In this paper, the authors proposed two multicast routing algorithms for irregular 3D mesh-based Bufferless Interconnection Network. The DRM-1 scheme sends multicast through a non-deterministic path. The DRM-2 scheme broke multicast into multiple single packets. Compared with the DRM-1 multicast routing algorithm, DRM-2 scheme with four different synthetic workloads acquires high system performance.

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“…It takes advantage of the short inter-layer distances that are characteristic of 3D ICs. In stacked mesh architecture, a six-port router is required instead of a seven port one for typical 3D NoC router, and vertical communication is just one hop away to any destination layer [11]. The single-hop and broadcast-based interlayer communication offers a unique and hitherto previously unexplored way to implement an efficient multicast routing for 3D networks-on-chip.…”

Section: Introductionmentioning

confidence: 99%

An efficient implementation of Hamiltonian path based multicast routing for 3D interconnection networks

Moosavi

Rahmani²,

Liljeberg

et al. 2013

2013 21st Iranian Conference on Electrical Engineering (ICEE)

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In this paper, an efficient multicast partitioning and routing strategy for the 3D NoC-Bus Hybrid mesh architecture is proposed to support multicasting, thereby improving the overall NoC performance and area footprint. The proposed architecture exploits the beneficial attribute of a single-hop (bus-based) interlayer communication of the 3D Stacked mesh architecture to provide high-performance hardware multicast support. To this end, we propose a customized labeling and partitioning method to efficiently split the network into well-balanced subnetworks and enhance the multicast routing function. In addition, we present a Hamiltonian path based multicast routing algorithm which exhibits a high degree of parallelism and reduces the startup latency by generating only two messages for created subnetworks. Our extensive simulations with different traffic profiles show that our architecture using the proposed multicast routing strategy can help to achieve significant performance and area improvements over the the recently proposed 3D NoC architectures offering hardware multicasting.

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Generic Monitoring and Management Infrastructure for 3D NoC-Bus Hybrid Architectures

Cited by 12 publications

References 16 publications

DRTL: A heat-balanced deadlock-free routing algorithm for 3D topology network-on-chip

DRTL: A heat-balanced deadlock-free routing algorithm for 3D topology network-on-chip

Two Multicasting Schemes for Irregular 3D Mesh-based Bufferless NoCs

An efficient implementation of Hamiltonian path based multicast routing for 3D interconnection networks

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