2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings 2006
DOI: 10.1109/icsict.2006.306098
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Generation-Recombination-Trapping at Interface Traps In Compact MOS Transistor Modeling

Abstract: Operation lifetime of logic MOS transistors, endurance of memory MOS transistors, trapping noise in analog and RF MOS transistors, and standby power dissipation in all of these transistors, have their common origin in electron-hole GRT (generation-recombination-trapping) at SiO 2 /Si interface traps. Inclusion of GRT in MOS transistor model can be made using the surface-potential approach adopted by the next (second) generation compact model. This paper describes the theoretical analysis of the GRT currents in… Show more

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Cited by 7 publications
(4 citation statements)
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“…It should be noted that the back-gate voltage at peak current (V BG-peak ) shifts slightly to the low back-gate voltage as the voltage of PN junction increases. The results are consistent with the simulation results in the previous work [32].…”
Section: Resultssupporting
confidence: 93%
“…It should be noted that the back-gate voltage at peak current (V BG-peak ) shifts slightly to the low back-gate voltage as the voltage of PN junction increases. The results are consistent with the simulation results in the previous work [32].…”
Section: Resultssupporting
confidence: 93%
“…The DCIV technique is used to characterize the interface trap density by detecting the recombination current associated with the interface traps based on Shockley-Read-Hall steady-state recombination kinetics [9,19,20]. When an appropriate voltage is applied to the back gate, the back channel will be depleted totally and the electrons and holes near the interface traps at the back interface will be adequate.…”
Section: Introductionmentioning
confidence: 99%
“…When an appropriate voltage is applied to the back gate, the back channel will be depleted totally and the electrons and holes near the interface traps at the back interface will be adequate. The recombination rate of interface traps will reach the maximum and the density of interface traps will be calculated according to the SRH recombination theory [19][20][21]. In this paper, based on the DCIV method, the radiation characteristics of SOI NMOSFETs with different process conditions are investigated.…”
Section: Introductionmentioning
confidence: 99%
“…It is generally believed that low frequency noise of MOSFETs originates from capture/release of charge carriers by oxide traps which have relatively deep energy levels and long time constants [70]. Sah and Jie [71] recently suggested that with the presence of the oxide traps or interface states at energy levels close to conduction or valence band edges, gigahertz noise could be generated from carrier transitions between these interface traps/states and the conduction or valence bands. A similar point was also addressed by Pantisano and…”
Section: Introductionmentioning
confidence: 99%