Generalized Hypercube and Hyperbus Structures for a Computer Network

Bhuyan,; Agrawal, Govind P.

doi:10.1109/tc.1984.1676437

Cited by 737 publications

(284 citation statements)

References 17 publications

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“…The product (diameter × node degree) is a good criterion for measuring the relationship between cost and performance of a multiprocessor system [5], [8]. An interconnection network with a large diameter has a very low message passing bandwidth and a network with a high node degree is very expensive.…”

Section: Costmentioning

confidence: 99%

Modified Hierarchical 3D-Torus Network

Rahman

Inoguchi

Horiguchi

2005

IEICE Transactions on Information and Systems

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SUMMARY Three-dimensional (3D) wafer stacked implementation (WSI) has been proposed as a promising technology for massively parallel computers. A hierarchical 3D-torus (H3DT) network, which is a 3D-torus network of multiple basic modules in which the basic modules are 3D-mesh networks, has been proposed for efficient 3D-WSI. However, the restricted use of physical links between basic modules in the higher level networks reduces the dynamic communication performance of this network. A torus network has better dynamic communication performance than a mesh network. Therefore, we have modified the H3DT network by replacing the 3D-mesh modules by 3D-tori, calling it a Modified H3DT (MH3DT) network. This paper addresses the architectural details of the MH3DT network and explores aspects such as degree, diameter, cost, average distance, arc connectivity, bisection width, and wiring complexity. We also present a deadlock-free routing algorithm for the MH3DT network using two virtual channels and evaluate the network's dynamic communication performance under the uniform traffic pattern, using the proposed routing algorithm. It is shown that the MH3DT network possesses several attractive features including small diameter, small cost, small average distance, better bisection width, and better dynamic communication performance. key words: MH3DT network, static network performance, wormhole routing, deadlock-free routing, dynamic communication performance

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Section: Costmentioning

confidence: 99%

Modified Hierarchical 3D-Torus Network

Rahman

Inoguchi

Horiguchi

2005

IEICE Transactions on Information and Systems

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“…Some variations of the hypercube structures have been reported in the literature. A general class of hypercube structures is presented in [BhA84]. In that, the interconnection is based on a mixed radix number system and the technique results in a variety of the hypercube structures for a given number of …”

Section: Variations Of the Hypercubementioning

confidence: 99%

The Folded Hypercube ATM Switches

Park

Davis

2001

Networking — ICN 2001

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Over the past few years, many high performance asynchronous transfer mode (ATM) switches have been proposed. The majority of these switches have high performance but also high hardware complexity. Therefore, there is a need for switch designs with low complexity and high performance. This research proposes three new ATM switches based on the folded hypercube network (FHC). The performance of the three architectures are studied using a network model and simulation. The major performance parameters measured are the cell loss rate and cell delay time through the switch under uniform, normal, and bursty traffic patterns. To guarantee faster switching of time-sensitive cells, the routing algorithm of the three switches uses a priority scheme that gives higher precedence to the time-sensitive cells. Also, an output buffer controller is designed to manage the buffers in a fair manner. The three proposed switch architectures have lower complexity while providing equivalent or better switching performance compared to other more complex ATM switches described in the literature. This research shows a new approach to designing ATM switches by using the FHC as the switching fabric for the first time instead of using the crossbar, multi-path, or Banyan-based switching fabrics.iii DedicationsAfter a long and painful fight against cancer, my grandfather passed away on Christmas Eve, 1999.He deeply wanted to, but was not able to see me receive the doctorate degree. I was blessed to receive his continual love and support for me. I hope he is looking down on me from heaven feeling proud.This dissertation is dedicated to my grandfather, Wookyu Park, in his loving memory.

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“…The first one is called SWCube, which is based on the generalized hypercube [16]. SWCube accommodates a comparable number of servers to that of DPillar.…”

Section: Introductionmentioning

confidence: 99%

On the design and analysis of Data Center Network architectures for interconnecting dual-port servers

2014

IEEE INFOCOM 2014 - IEEE Conference on Computer Communications

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Abstract-We consider the design and analysis of Data Center Network (DCN) architectures for interconnecting dual-port servers. Unlike existing works, we propose the concept of Normalized Switch Delay (NSD) to distinguish a server-to-server-direct hop and a server-to-server-via-switch hop, to unify the design of DCN architectures. We then consider a fundamental problem: maximizing the number of dual-port servers, given network diameter and switch port number; and give an upper bound on this maximum number. Two novel architectures are proposed: SWCube and SWKautz, based on the generalized hypercube and Kautz graph, respectively, which in most cases accommodate more servers than BCN [1], which was claimed to be the largest known architecture. Compared with three existing architectures, SWCube and SWKautz demonstrate various advantages. Analysis and simulations also show that SWCube and SWKautz have nice properties for DCNs, such as low diameter, good fault-tolerance, and capability of efficiently handling network congestion.

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Generalized Hypercube and Hyperbus Structures for a Computer Network

Cited by 737 publications

References 17 publications

Modified Hierarchical 3D-Torus Network

Modified Hierarchical 3D-Torus Network

The Folded Hypercube ATM Switches

On the design and analysis of Data Center Network architectures for interconnecting dual-port servers

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