Generalized ACE Constrained Progressive Edge-Growth LDPC Code Design

Vukobratović, Dejan; Šenk, V.

doi:10.1109/lcomm.2008.071457

Cited by 65 publications

(72 citation statements)

References 9 publications

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“…In this case, if BP algorithm proceeds for more than three iterations, the receive messages of the involved bit nodes v 2 ,v 4 ,v 5 will partly contain its own message sent three iterations before. For this reason, the minimum cycle length in the Tanner Graph, called "girth", has a strong relationship with its BER performance, and is considered as an important metric in LDPC code construction algorithms (PEG, ACE) [7,8].…”

Section: The Bp Algorithm and Effect Of Cyclementioning

confidence: 99%

“…The progressive edge-growth (PEG) algorithm [7] is a girth-aware construction method that tries to make shortest cycle as large as possible. Approximate cycle extrinsic (ACE) message degree constraint is further combined into PEG [8] to lower error floor. However, these performance-aware methods do not take hardware implementation into account, which usually result in low efficiency or high complexity.…”

Section: Introductionmentioning

confidence: 99%

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Systematic construction, verification and implementation methodology for LDPC codes

Cui

Wang

et al. 2012

J Wireless Com Network

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In this article, a novel and systematic Low-density parity-check (LDPC) code construction, verification and implementation methodology is proposed. The methodology is composed by the simulated annealing based LDPC code constructor, the GPU based high-speed code selector, the ant colony optimization based pipeline scheduler and the FPGA-based hardware implementer. Compared to the traditional ways, this methodology enables us to construct both decoding-performance-aware and hardware-efficiency-aware LDPC codes in a short time. Simulation results show that the generated codes have much less cycles (length 6 cycles eliminated) and memory conflicts (75% reduction on idle clocks), while having no BER performance loss compared to WiMAX codes. Additionally, the simulation speeds up by 490 times under float precision against CPU and a net throughput 24.5 Mbps is achieved. Finally, a net throughput 1.2 Gbps (bit-throughput 2.4 Gbps) multi-mode LDPC decoder is implemented on FPGA, with completely on-the-fly configurations and less than 0.2 dB BER performance loss.

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Section: The Bp Algorithm and Effect Of Cyclementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Systematic construction, verification and implementation methodology for LDPC codes

Cui

Wang

et al. 2012

J Wireless Com Network

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show abstract

“…Several construction algorithms can be found in literature. The most important ones are the random construction (avoiding only length-4 cycles between degree-2 variable nodes), the ACE (approximate cycle extrinsic message degree) algorithm [33], the PEG (progressive edgegrowth) algorithm [34], and the PEG-ACE algorithm [35]. It is widely believed that an irregular variable node degree distribution is the only requirement to provide UEP, see for example [29,30].…”

Section: Necessary Degree Distribution Properties Of Uep-ldpc Codesmentioning

confidence: 99%

UEP Concepts in Modulation and Coding

Henkel

Hassan

Deetzen³

et al. 2010

Advances in Multimedia

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First unequal error protection (UEP) proposals date back to the 1960's (Masnick and Wolf; 1967), but now with the introduction of scalable video, UEP develops to a key concept for the transport of multimedia data. The paper presents an overview of some new approaches realizing UEP properties in physical transport, especially multicarrier modulation, or with LDPC and Turbo codes. For multicarrier modulation, UEP bit-loading together with hierarchical modulation is described allowing for an arbitrary number of classes, arbitrary SNR margins between the classes, and arbitrary number of bits per class. In Turbo coding, pruning, as a counterpart of puncturing is presented for flexible bit-rate adaptations, including tables with optimized pruning patterns. Bit- and/or check-irregular LDPC codes may be designed to provide UEP to its code bits. However, irregular degree distributions alone do not ensure UEP, and other necessary properties of the parity-check matrix for providing UEP are also pointed out. Pruning is also the means for constructing variable-rate LDPC codes for UEP, especially controlling the check-node profile.

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“…The reason for such puncturing pattern is explained in Chapter 7. In order to illustrate the principle of uniform puncturing, we give the indices of first ten punctured bits: [2,8,11,14,17,21,27,29,33,39]. Note that the punctured bits are uniformly distributed among the SCNs.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…When designing FL-LDPC codes, short cycles with small ACE should be avoided. The ACE and PEG can be combined to offer a further improvement on the error floor [27].…”

Section: Emd and Acementioning

confidence: 99%

Design of Finite-Length Generalized LDPC Codes

Xie¹

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Generalized ACE Constrained Progressive Edge-Growth LDPC Code Design

Cited by 65 publications

References 9 publications

Systematic construction, verification and implementation methodology for LDPC codes

Systematic construction, verification and implementation methodology for LDPC codes

UEP Concepts in Modulation and Coding

Design of Finite-Length Generalized LDPC Codes

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