2012 12th IEEE International Conference on Nanotechnology (IEEE-NANO) 2012
DOI: 10.1109/nano.2012.6321976
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Ge nanowire transistors with high-quality interfaces by atomic-scale thermal annealing

Abstract: High-performance Ge nanowire transistors with single-crystalline germanides as Schottky source/drain contacts were fabricated via the solid-state reaction between a single-crystalline Ge nanowire and two Ni contact pads using rapid thermal annealing. The formed high-quality germanides show atomically clean epitaxial interface with the Ge nanowire. The effect of oxide confinement was also studied to control the growth of nickel germanides, and further to passivate the Ge nanowire surface. In addition, a room-te… Show more

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Cited by 3 publications
(3 citation statements)
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“…24 It should be pointed out that the Curie temperature of Mn 5 Ge 3 can be further increased up to 445 K with appropriate carbon doping in order to build practical spintronic devices that can operate at room temperature. 25 Moreover, such one-dimensional high-quality germanide/Ge contacts formed by RTA were found to effectively alleviate the Fermi level pinning, 26 for which conventional metal/Ge contacts were suffered. 27 This should allow us to probe the intrinsic spin property in the Mn 5 Ge 3 /Ge/Mn 5 Ge 3 nanowire transistor.…”
mentioning
confidence: 99%
“…24 It should be pointed out that the Curie temperature of Mn 5 Ge 3 can be further increased up to 445 K with appropriate carbon doping in order to build practical spintronic devices that can operate at room temperature. 25 Moreover, such one-dimensional high-quality germanide/Ge contacts formed by RTA were found to effectively alleviate the Fermi level pinning, 26 for which conventional metal/Ge contacts were suffered. 27 This should allow us to probe the intrinsic spin property in the Mn 5 Ge 3 /Ge/Mn 5 Ge 3 nanowire transistor.…”
mentioning
confidence: 99%
“…An efficient method is the use of a ferromagnetic material, which can be directly grown on a semiconducting substrate . It has recently been reported the achievement of spin injection on n‐type Ge using epitaxial Mn 5 Ge 3 thin films or nanowires . Polarized electrons, from the intermetallic compound, pass through a Schottky barrier at the Mn 5 Ge 3 /Ge interface , where the width of the barrier depends on the crystal quality of the interface .…”
Section: Introductionmentioning
confidence: 99%
“…[15][16][17][18] Meanwhile, different device structures such as double gate (DG) and gate-all-around (GAA) have been explored to minimize short channel effect (SCE), and GAA structures are reported to have excellent gate control and low drain-induced barrier lowering (DIBL). [19][20][21][22] Recently, Ge SB MOSFETs with GAA structures have been fabricated, 23,24) and it is shown that GAA structures exhibit large drive current and great control over channel. However, its device performance is still affected by high OFF-state current, and DS structures might stand a chance of suppressing leakage current.…”
Section: Introductionmentioning
confidence: 99%