2020
DOI: 10.1088/1361-6463/ab91ee
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Gate structure dependent normally-off AlGaN/GaN heterostructure field-effect transistors with p-GaN cap layer

Abstract: In this study, the influences of a p-GaN gate structure on normally-off AlGaN/GaN heterostructure field-effect transistors were evaluated. It is demonstrated that a metal-insulator-semiconductor (MIS) gate structure can effectively suppress the gate leakage current and shift the threshold voltage positively, as compared with the Schottky and ohmic gate structures. To further improve the device performance, a novel gate-first MIS gate structure was proposed by combining the self-alignment gate and low-temperatu… Show more

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Cited by 6 publications
(5 citation statements)
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“…Another method that is capable of effectively improving the gate voltage of a p-GaN HEMT device is to grow a passivation layer on it. Pu et al grew a SiN passivation layer on a p-GaN layer [ 30 , 31 ], the structural diagram of which is shown in Figure 11 . This approach combines the gate metal, passivation layer, and p-GaN of the device together to form an MIS structure, which greatly reduces the trapped surface charges of the device, thereby mitigating the gate-leakage current.…”
Section: Research Progressmentioning
confidence: 99%
“…Another method that is capable of effectively improving the gate voltage of a p-GaN HEMT device is to grow a passivation layer on it. Pu et al grew a SiN passivation layer on a p-GaN layer [ 30 , 31 ], the structural diagram of which is shown in Figure 11 . This approach combines the gate metal, passivation layer, and p-GaN of the device together to form an MIS structure, which greatly reduces the trapped surface charges of the device, thereby mitigating the gate-leakage current.…”
Section: Research Progressmentioning
confidence: 99%
“…Because the leakage current of the gate is caused by a tunneling phenomenon that is very sensitive to the barrier layer thickness and uniformity, this approach necessitates a perfect control of the AlGaN etching process. Furthermore, etching-induced damage might increase the leakage current of the gate and non-uniformity effects in VTH [91]. Additionally, there are two types of gates recessed available such as the slight MIS-HEMT of the recessed-gate design underneath the gate dielectric, a thin AlGaN barrier, and the complete MIS-FET of the recessed-gate design, known as a MOS-HFET hybrid, as shown in Figure 23a Standard MIS-FETs may obtain an E-mode performance by entirely eliminating the AlGaN barrier layer underneath the gate, resulting in the device turning off at a zero gate voltage.…”
Section: Hemts With P-gan Gate (Normally Off)mentioning
confidence: 99%
“…Then, p-GaN at non-gate region was removed by a low damage recipe with ICP/bias of 100/20 W and SiCl 4 etching gas. [8] Before the deposition of ohmic metal, a ICP plasma treatment was carried out on the ohmic region to realize the low temperature annealing process. The recipe was ICP/bias 100/100 W at 0.5 Pa for 12 s. Ti/Al/Ti/Au (20/200/40/40 nm) ohmic metal stacks were then deposited by magnetron sputtering and annealed at 500 • C for 20 min in N 2 ambient.…”
Section: Device Structure and Fabricationmentioning
confidence: 99%
“…[5] In terms of realizing normally-off operation, the p-GaN cap layer structure demonstrates tremendous advantages such as high channel mobility, good V th uniformity and suitable for integration. [6][7][8][9][10][11] Based on those advantages, the AlGaN/GaN HFETs with p-GaN cap layer become the unique commercial solution to achieve the normally-off operation with respect to gate recess, fluorine ion treatment, ultrathin barrier, and so on. [12,13] On the basis of simulation and experiment results, the V th of p-GaN HFET presents a relationship with the contact type between the gate electrode and p-GaN.…”
Section: Introductionmentioning
confidence: 99%
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