Gate Stress Polarity Dependence of AC Bias Temperature Instability in Silicon Carbide MOSFETs

Zhong, Xiaohan; Jiang, Huaping; Tang, Lei; Qi, Xiaowei; Jiang, Peng; Li, Ran

doi:10.1109/ted.2022.3164641

Cited by 9 publications

(2 citation statements)

References 17 publications

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“…Therefore, NBTI degradation under DOV stresses is modeled using a comprehensive framework [48], which can roughly predict the long-time degradation of transistors. In some works [49], [50] the aging model calculating the degradation induced by NBTI follows a logarithmic dependence on time under DOV stress. Previous studies mainly focused on NBTI-only and ignored PBTI.…”

Section: Model Formulamentioning

confidence: 99%

Development and Challenges of Reliability Modeling From Transistors to Circuits

Yang

Sang

Wang

et al. 2023

IEEE J. Electron Devices Soc.

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The integration density of electronic systems is limited by the reliability of the integrated circuits. To guarantee the overall performance, the integrated circuit reliability must be modeled and analyzed at the early design stage. This paper reviews some of the most important intrinsic aging mechanisms of MOSFETs and elaborates the physical mechanism of the coupling between aging effects. Then the progress in reliability modeling under static and dynamic operational voltages is reviewed. It is found that although these models can accurately predict the degradation in short term, they are with large errors for the long-term degradation prediction. Besides, for the circuit-level reliability modeling and simulation approach, there are still problems to be solved. This article aims to provide guidance for researchers and practitioners in integrated circuit field, and highlight the challenges for reliability research. It is of great significance to the optimization of the reliability of integrated circuits.

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Section: Model Formulamentioning

confidence: 99%

Development and Challenges of Reliability Modeling From Transistors to Circuits

Yang

Sang

Wang

et al. 2023

IEEE J. Electron Devices Soc.

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“…Threshold voltage stability is another key MOS reliability metric [43] which must be proven out for new MOS materials and processing. Finally, threshold instability under gate switching conditions also must be examined, as recent research has demonstrated this to be an important consideration under certain device operation conditions [44,45].…”

Section: Interface Characterization: Performance and Reliabilitymentioning

confidence: 99%

Outlook for Dielectric/SiC Interfaces for Future Generation MOSFETs

Lichtenwalner

Ryu

Hull

et al. 2023

MSF

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Silicon carbide (SiC) metal-oxide semiconductor (MOS) power devices such as metal-oxide semiconductor field-effect transistors (MOSFETs) require a stable and low defect-density interface, and a high-quality dielectric, for good device performance and reliability. Notably, the interface and dielectric properties determine the threshold voltage stability, the field-effect channel mobility, and the device lifetime as limited by dielectric breakdown in both the forward on-state and reverse blocking conditions. Here we discuss the present state of SiC MOS processing and properties and point to directions for future development. Important items to address are: 1) interface passivation approaches; 2) dielectrics; 3) device design; and 4) in-depth measurements of the interface quality and reliability.

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