Gate oxide degradation of SiC MOSFET under short-circuit aging tests

Safa, Mbarek; Fouquet, Francois; Dherbécourt, Pascal; Masmoudi, Mohamed; Latry, Olivier

doi:10.1016/j.microrel.2016.07.132

Cited by 26 publications

(18 citation statements)

References 10 publications

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“…This result confirmed in the study of Raman, Cortes and Hao [15][16][17][18][19][20]. Since these parameters are shifted after ageing, as thereby given also in literatures [4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23].…”

Section: Resultssupporting

confidence: 84%

Symptom reliability: S‐parameters evaluation of power laterally diffused‐metal–oxide–semiconductor field‐effect transistor after pulsed‐RF life tests for a radar application

Belaïd

2018

IET Circuits, Devices & Systems

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This paper treats the s-parameter performance degradation by hot electron induced for N-MOSFET devices used in radar applications. This study is relevant for devices operating in the RF frequency regime. The power LD-MOSFET device (0.8 µm channel length, Gate oxide thickness 0.065 µm and 2.2 GHz) are designed and fabricated. Subsequently, life tests in pulsed RF cause, after ageing, the electrical behaviour and its relation with charge trapping at the interface are presented and discussed. Unlike all other current methods, a complete evaluation of S parameters is carried out to obtain key information concerning the defects location. The s-parameter performance degradation can be explained by the transconductance and the miller capacitance move, and by the leakage current augmentation IG, which is shown by hot-carrier event from the Si/SiO 2 interface state generation and/or in a build up of negative charge. Also, the degradation can be predicted by the experimental correlation of RF and dc performance shifts, favour by the measurement of dc performance or initial leakage current. The analysis accompanied proves that the s-parameters shift by hot electron induced and should be taken into consideration in the design. Through physical processes of ATLAS-SILVACO simulations these degradation phenomena are located and confirmed

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Section: Resultssupporting

confidence: 84%

Symptom reliability: S‐parameters evaluation of power laterally diffused‐metal–oxide–semiconductor field‐effect transistor after pulsed‐RF life tests for a radar application

Belaïd

2018

IET Circuits, Devices & Systems

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“…Moreover, the gate-source voltage drop into R G caused by the gate current rise can explain the maximum saturation current decrease. However, the lower saturation current could also be explained by a decrease of the channel mobility [2] or a threshold voltage raise [3].…”

Section: Degradation Scenariosmentioning

confidence: 99%

Investigation on damaged planar-oxide of 1200 V SiC power MOSFETs in non-destructive short-circuit operation

Boige

Richardeau

Trémouilles

et al. 2017

Microelectronics Reliability

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The purpose of this paper is to present an extensive study of three 1200 V silicon carbide (SiC) Power MOSFETs in non-destructive, but leading to degradations, short-circuit operation. Unusually, as compared with equivalent device built on silicon, the damage signature is a significant gate current increase but the components are still functional. In order to find the damage location, non-destructive and destructive methods have been carried out. The results converge to a local gate oxide breakdown caused by the important electrical and thermal stress during short-circuit operation leading to different failure mechanisms depending on the device design.

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“…Power devices based on wide bandgap material like Silicon Carbide (SiC) MOSFET are emerging as an effective technology solution to provide such high performance switches. One main obstacle of the SiC MOSFET expansion to industrial application is their reliability and especially their low robustness compared with Silicon devices in short-circuit (SC) operation [1]- [7]. The observed behaviour is different compared to Si devices.…”

Section: Introductionmentioning

confidence: 99%

“…Indeed, the SC current density is much higher and after few microseconds in SC operation, a large gate current appears. This current has been studied from a "user point of view" in [2] and some physical explanation have been proposed in [7], [8]. It is generally assumed that the physical origin of this gate current is due to Fowler-Nordheim (F-N) tunnelling.…”

Section: Introductionmentioning

confidence: 99%

Physical Origin of the Gate Current Surge During Short-Circuit Operation of SiC MOSFET

Boige

Trémouilles

Richardeau

2019

IEEE Electron Device Lett.

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Gate oxide degradation of SiC MOSFET under short-circuit aging tests

Cited by 26 publications

References 10 publications

Symptom reliability: S‐parameters evaluation of power laterally diffused‐metal–oxide–semiconductor field‐effect transistor after pulsed‐RF life tests for a radar application

Symptom reliability: S‐parameters evaluation of power laterally diffused‐metal–oxide–semiconductor field‐effect transistor after pulsed‐RF life tests for a radar application

Investigation on damaged planar-oxide of 1200 V SiC power MOSFETs in non-destructive short-circuit operation

Physical Origin of the Gate Current Surge During Short-Circuit Operation of SiC MOSFET

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