Gate Leakage Advantage of LaO Incorporation for V_t Tuning in High-k nMOSFETs over Metal Gate WF Control

Abstract

We have investigated impacts of LaO incorporation into a high-k dielectric (HK) for threshold voltage (V t) tuning on gate leakage current (J g) in HK nFETs in detail. A J g-V g curve is not shifted along with a change in V t and J g decreases at fixed V g when V t is decreased by LaO incorporation in HK nFETs. Evaluation of barrier heights at a metal gate (MG)/HK interface suggests that this is owing to no decrease of the conduction band offset at a MG/HK interface by LaO incorporation. On the other hand, J g increases at fixed V g because a J g-V g curve is shifted along with V t when a work-function (WF) is lowered by MG. Therefore, a V t tuning technique of LaO incorporation has a clear advantage over a WF control by MG for suppressing the J g increase associated with the continued scaling of CMOSFETs.