2018
DOI: 10.1049/iet-pel.2017.0535
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Gate driver for high power SiC modules: design considerations, development and experimental validation

Abstract: The introduction the full-SiC (full silicon carbide) high power modules in the power semiconductors market makes necessary the development of new gate drivers suitable for its switching characteristics. The design considerations, challenges and implementation for high power SiC metal-oxide-semiconductor field-effect transistors is presented in this study. Aspects like voltage clamping, overcurrent/short-circuit protection, different power supply voltage levels, gate circuit and soft offswitching are addressed,… Show more

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Cited by 15 publications
(8 citation statements)
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“…However, in whatever cases, the switching losses must be obtained from experiments to achieve more accurate estimation of the device junction temperature for heatsink design. By using a RC snubber following a similar design method in [17, 18], a SiC MOSFET suspension prototype is built showing that the voltage ringing is much suppressed as shown in Fig. 10.…”
Section: Discussion and Future Workmentioning
confidence: 99%
“…However, in whatever cases, the switching losses must be obtained from experiments to achieve more accurate estimation of the device junction temperature for heatsink design. By using a RC snubber following a similar design method in [17, 18], a SiC MOSFET suspension prototype is built showing that the voltage ringing is much suppressed as shown in Fig. 10.…”
Section: Discussion and Future Workmentioning
confidence: 99%
“…The conventional Si and the SiC‐hybrid modules have been tested with the commercial driver used in the original Si converter (2SP0320) from Power Integrations, suitable for the Primepack packaging. However, the full‐SiC modules have been tested with an ad hoc designed gate driver, presented in [13].…”
Section: Sic‐hybrid and Full‐sic Versus Si Devicesmentioning
confidence: 99%
“…The design aspects that must be considered from the point of view of the gate driver are presented in [12][13][14], with the aim of reducing the switching time without increasing electromagnetic interference (EMI).…”
Section: Introductionmentioning
confidence: 99%
“…Optimizing the PCB architecture and lowering the parasitic parameters can reduce crosstalk, but the effect is constrained by the package structure, cost, and power factors [6]. In [7], crosstalk suppression is achieved by slowing down the switching speed of SiC MOSFETs using buffer circuits and larger gate resistors, but the device advantages of SiC MOSFETs cannot be fully exploited, and the switching losses are increased. In [8], a negative voltage was used to turn off SiC MOSFETs, which can suppress positive gate-source crosstalk voltage, however, it cannot suppress negative gate-source crosstalk voltage.…”
Section: Introductionmentioning
confidence: 99%